Spread spectrum clock generation

• US 8,037,336 B2
• Filed: 05/15/2007
• Issued: 10/11/2011
• Est. Priority Date: 05/15/2006
• Status: Active Grant

• Current Assignee: STMicroelectronics Pvt Ltd. (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Pvt Ltd. (STMicroelectronics NV)
• Inventors: Chawla, Nitin
• Primary Examiner(s): ELAMIN, ABDELMONIEM I
• Application Number:
  US11/803,725
• Publication Number:
  US 20080129351A1
• Time in Patent Office: 1,610 Days
• Field of Search: 713400-401, 713500-503, 713600-601, 327/147, 327/150, 327/156
• US Class Current: 713/401
• CPC Class Codes: H03C 3/0925 applying frequency modulation at the divider in the feedback loop
• CPC Class Codes: H03C 3/0933 using fractional frequency division in the feedback loop of the phase locked loop
• CPC Class Codes: H03L 7/1976 using a phase accumulator for controlling the counter or frequency divider
• CPC Class Codes: H03M 7/3026 the quantiser being a multiple bit one
• CPC Class Codes: H03M 7/3042 the modulator being of the error feedback type, i.e. having loop filter stages in the feedback path only
• CPC Class Codes: H04B 1/69 Spread spectrum techniques

Abstract

The present disclosure provides a spread spectrum clock generation system having a digitally controlled phase locked loop (PLL) and a digital frequency profile generator to create a near optimal frequency modulation profile for the purpose of achieving spectral flatness in the output frequency modulated clock. The circuit is combined with a multilevel error feedback noise shaping structure that provides the required noise transfer function for the quantization noise but maintains a unity gain all pass signal transfer function. This arrangement offers minimal degradation of the in-band signal-to-noise ratio (SNR) at the cost of higher out-of-band noise.

Claims

1. A spread spectrum clock generation system comprising:

a digitally controlled phase locked loop (PLL) circuit; and

a digital frequency profile generator connected to the digital control input of said PLL circuit, wherein said digital frequency profile generator comprises a triangular wave generator and a second order sigma-delta modulator (SDM) connected to an output of said triangular wave generator, wherein said triangle wave generator comprises a first state machine having a first set of inputs connected to an output of a synchronizer to generate an output count corresponding to input amplitude and frequency values and a second state machine having a first set of inputs connected to the output of said synchronizer and a second set of inputs connected to an output of said first state machine with its output being fed back to a second set of inputs of said first state machine, to sequence phases of a triangular wave.

2. The system according to claim 1, wherein

the synchronizer to synchronize input asynchronous amplitude and frequency values to an internal system clock.

3. The system according to claim 1, wherein said second order sigma-delta modulator comprises:

a constant multiplier;

a first adder having one input connected to the output of said multiplier;

a second adder having one input connected to the output of said first adder;

a ditherer connected to the second input of said second adder;

a saturator connected to the output of said second adder;

a quantizer connected to the output of the saturator;

a synchronizer connected to the output of said quantizer;

a zero LSB padder having its input connected to the output of said quantizer;

a difference generator having one input connected to the output of said zero LSB padder and its second input connected to the output of said saturator;

a 3 MSB dropping block connected to the output of said difference generator; and

a loop filter having its input connected to the output of said 3 MSB dropping block, wherein the output of said loop filter connected to the second input of said first adder.

4. The system according to claim 1, wherein said triangle wave generator is configurable for a specified amplitude and frequency and provides two operational modes.

5. The system according to claim 4, wherein a first mode of the two operation modes comprises a center-spread mode in which the nominal frequency is the specified clock frequency.

6. The system according to claim 4, wherein a second mode of the two operation modes comprises a down-spread mode in which the maximum frequency is the specified clock frequency and the nominal frequency is offset below the original clock frequency by an amount which is a function of a configurable modulation depth.

16. The system according to claim 4, wherein said triangle wave generator comprises:

a synchronizer configured to synchronize input asynchronous amplitude and frequency values to an internal system clock.

17. The system according to claim 5, wherein the synchronizer is configured to synchronize input asynchronous amplitude and frequency values to an internal system clock.

18. The system according to claim 6, wherein the synchronizer is configured to synchronize input asynchronous amplitude and frequency values to an internal system clock.

7. A method for generating a spread spectrum clock, the method comprising:

providing a digitally controlled phase locked loop (PLL) circuit; and

modulating the frequency generated by said PLL circuit by using a digital frequency profile generator to apply a controlled modulating signal to the digital control input of said PLL circuit, wherein the modulating signal is generated using at least one wave signal, wherein said modulating signal is generated by;

generating a triangular wave signal; and

performing sigma delta modulation on said triangular wave signal.

8. The method according to claim 7, wherein said triangular wave signal is generated by:

synchronously loading amplitude and frequency counts into an up-down count mechanism configured to provide a repetitive triangular cannot pattern based on said amplitude and frequency count values; and

enabling said count mechanism to perform the count operation.

9. The method according to claim 8, wherein said sigma delta modulation comprises:

scaling the input signal;

adding a dither to said scaled input signal;

limiting the value of said dithered output;

quantizing said limited dithered output;

synchronizing said quantized output;

padding said synchronized quantized output with least significant bits;

determining the difference between said limited dithered output and said padded synchronized quantized value;

extracting and filtering a limited value of said difference; and

adding back said filtered difference to said scaled input signal to produce the final output.

20. The method according to claim 7, wherein said triangle wave is configurable for a specified amplitude and frequency.

10. For use in spread spectrum clock generation, a system for providing center spread and down spread operating modes, the system comprising:

a digitally controlled phase locked loop (PLL) circuit; and

a digital frequency profile generator connected to the digital control input of said PLL circuit, wherein said digital frequency profile generator comprises;

a triangular wave generator; and

a second order sigma-delta modulator (SDM) connected to an output of said triangular wave generator wherein said triangle wave generator comprises a synchronizer to synchronize input asynchronous amplitude and frequency values to an internal system clock, wherein said digital frequency profile generator further comprises a first state machine having a first set of inputs connected to an output of said synchronizer to generate an output count corresponding to input amplitude and frequency values and a second state machine having a first set of inputs connected to the output of said synchronizer and a second set of inputs connected to an output of said first state machine with its output being fed back to a second set of inputs of said first state machine, to sequence phases of triangular wave.

11. The system according to claim 10 wherein said second order sigma-delta modulator comprises:

a constant multiplier;

a first adder having one input connected to the output of said multiplier;

a second adder having one input connected to the output of said first adder;

a ditherer connected to the second input of said second adder;

a saturator connected to the output of said second adder;

a quantizer connected to the output of the saturator;

a synchronizer connected to the output of said quantizer;

a zero LSB padder having its input connected to the output of said quantizer;

a difference generator having one input connected to the output of said zero LSB padder and its second input connected to the output of said saturator;

a 3 MSB dropping block connected to the output of said difference generator; and

a loop filter having its input connected to the output of said 3 MSB dropping block, wherein the output of said loop filter connected to the second input of said first adder.

12. The system according to claim 10, wherein said triangle wave generator is configurable for a specified amplitude and frequency and provides two operational modes.

13. The system according to claim 12, wherein a first mode of the two operation modes comprises a center-spread mode in which the nominal frequency is the specified clock frequency.

14. The system according to claim 12, wherein a second mode of the two operation modes comprises a down-spread mode in which the maximum frequency is the specified clock frequency.

15. The system according to claim 14, wherein the second mode further comprises offsetting the nominal frequency below the original clock frequency by an amount which is a function of a configurable modulation depth.

19. The system according to claim 11, wherein said triangle wave generator is configurable for a specified amplitude and frequency and provides two operational modes.