Altering a degree of redundancy used during execution of an application
First Claim
1. A processor operating method comprising:
- executing an application using a first number of a plurality of processor cores;
evaluating a first transition criterion based on a characteristic of the application while the application is executed using the first number of the plurality of processor cores; and
after the evaluating, redundantly executing the application using a second number of the plurality of processor cores.
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Accused Products
Abstract
Processor operating methods and integrated circuits are described. According to one embodiment, a processor operating method includes executing an application using a first number of a plurality of processor cores. The method also includes, during the executing using the first number, evaluating a transition criterion and after the evaluating, executing the application using a second number of the plurality of processor cores. According to another embodiment, an integrated circuit includes a plurality of processor cores and processing circuitry. The processing circuitry is configured to configure a first number of the plurality of processor cores to execute an application, evaluate a transition criterion, and, in response to evaluating the transition criterion, configure a second number of the plurality of processor cores to execute the application. Additional embodiments are described in the disclosure.
42 Citations
19 Claims
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1. A processor operating method comprising:
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executing an application using a first number of a plurality of processor cores; evaluating a first transition criterion based on a characteristic of the application while the application is executed using the first number of the plurality of processor cores; and after the evaluating, redundantly executing the application using a second number of the plurality of processor cores. - View Dependent Claims (2, 3, 4, 5)
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6. A processor operating method comprising:
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performing a single execution of an application, the application comprising a plurality of instructions; during the performing of the single execution of the application, non-redundantly executing a first subset of the instructions of the plurality; during the performing of the single execution of the application, executing a second subset of the instructions of the plurality a first time; during the performing of the single execution of the application, redundantly executing the second subset of the instructions of the plurality a second time; and comparing results of the executing of the second subset the first time with results of the executing of the second subset the second time. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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13. An integrated circuit comprising:
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a plurality of processor cores; and processing circuitry configured to; configure a first number of the plurality of processor cores to execute an application; evaluate a first transition criterion based on a characteristic of the application while the first number of the plurality of processor cores are executing the application; and in response to evaluating the first transition criterion, configure a second number of the plurality of processor cores to redundantly execute the application. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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Specification