Apparatus and method for testing high-speed serial transmitters and other devices

• US 8,037,371 B1
• Filed: 05/14/2007
• Issued: 10/11/2011
• Est. Priority Date: 05/14/2007
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Tsinker, Vadim, Bikulcius, Simon
• Primary Examiner(s): Gaffin; Jeffrey A
• Assistant Examiner(s): NGUYEN, STEVE N
• Application Number:
  US11/803,231
• Time in Patent Office: 1,611 Days
• Field of Search: None
• US Class Current: 714/700
• CPC Class Codes: G01R 31/31706 involving differential digital signals, e.g. testing differential signal circuits, using differential signals for testing
• CPC Class Codes: G01R 31/31709 Jitter measurements; Jitter generators measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901

Abstract

A testing device for testing a high-speed serial transmitter or other device includes an input stage having a first comparator, a second comparator, and a digital-to-analog converter. The first comparator compares first differential signals from a device under test. The second comparator compares the first differential signals and second differential signals from the digital-to-analog converter. An analysis unit identifies first beats based on an output of the first comparator and second beats based on an output of the second comparator. The analysis unit identifies one or more characteristics of the device under test (such as jitter, differential signal swing, and transition time) based on the first and second beats. A clock unit provides an adjustable clock signal to the comparators. The clock signal may have a frequency shift with respect to a frequency of the device under test.

Claims

1. A method comprising:

generating a plurality of first beats based on a comparison of first differential signals to one another using a first comparator, the first differential signals from a device under test;

generating a plurality of second beats based on a comparison of (i) the first differential signals and (ii) second differential signals from a digital-to-analog converter using a second comparator;

receiving at an analyzer the first and second beats, the analyzer coupled to outputs of the first and second comparators; and

determining one or more characteristics of the device under test using the first and second beats at the analyzer.

2. The method of claim 1, wherein determining the one or more characteristics of the device under test comprises determining a jitter associated with the device under test using the first beats.

3. The method of claim 2, wherein determining the jitter comprises:

determining edge widths of multiple first beats; and

averaging the edge widths to identify the jitter.

4. The method of claim 1, wherein determining the one or more characteristics of the device under test comprises determining a differential signal swing associated with the device under test using the second beats.

5. The method of claim 4, wherein determining the differential signal swing comprises:

altering control values provided to the digital-to-analog converter to identify a toggling in a comparator output; and

identifying the differential signal swing based on the identified toggling.

6. The method of claim 1, wherein determining the one or more characteristics of the device under test comprises determining a transition time associated with the device under test using the first and second beats.

7. The method of claim 6, wherein determining the transition time comprises:

identifying a first time period from one of the first beats to a subsequent one of the second beats;

identifying a second time period from another of the first beats to a preceding one of the second beats; and

summing the first and second time periods to identify the transition time.

8. The method of claim 6, wherein determining the transition time comprises identifying a time period between two of the second beats surrounding one of the first beats.

9. The method of claim 1, wherein:

a first latched comparator compares the first differential signals;

a second latched comparator compares the first differential signals and the second differential signals; and

the latched comparators are clocked by a clock signal having a frequency shift with respect to a frequency of the device under test.

10. An apparatus comprising:

a first comparator configured to receive first differential signals from a device under test and to compare the first differential signals to one another and generate a plurality of first beats;

a second comparator configured to compare (i) the first differential signals and (ii) second differential signals from a digital-to-analog converter and generate a plurality of second beats; and

an analyzer coupled to outputs of the first and second comparators and configured to receive the plurality of first beats from the first comparator, a receive the plurality of second beats from the second comparator, and determine one or more characteristics of the device under test using the first and second beats.

11. The apparatus of claim 10, wherein the analyzer is configured to determine a jitter associated with the device under test.

12. The apparatus of claim 10, wherein the analyzer is configured to determine a differential signal swing associated with the device under test by:

altering control values provided to the digital-to-analog converter to identify a toggling in the output of the second comparator; and

identifying the differential signal swing based on the identified toggling.

13. The apparatus of claim 10, wherein the analyzer is configured to determine a transition time associated with the device under test by:

identifying a first time period from one of the first beats to a subsequent one of the second beats;

identifying a second time period from another of the first beats to a preceding one of the second beats; and

summing the first and second time periods to identify the transition time.

14. The apparatus of claim 10, wherein the analyzer is configured to determine a transition time associated with the device under test by identifying a time period between two of the second beats surrounding one of the first beats.

15. The apparatus of claim 10, further comprising:

a voltage-controlled oscillator configured to generate a clock signal for the first and second comparators, the clock signal having a frequency shift with respect to a frequency of the device under test; and

a second digital-to-analog converter configured to receive control values from the analyzer and generate a control voltage for the voltage-controlled oscillator.

16. The apparatus of claim 10, wherein:

the analyzer comprises a field programmable gate array; and

the apparatus further comprises first and second serial-to-parallel converters configured to convert the outputs of the first and second comparators into parallel format.

17. A system comprising:

a device under test; and

a testing device comprising;

a first comparator configured to receive first differential signals from the device under test and generate a plurality of first beats based on a comparison of the first differential signals to one another;

a second comparator configured to generate a plurality of second beats based on a comparison of (i) the first differential signals and (ii) second differential signals from a digital-to-analog converter; and

an analyzer coupled to outputs of the first and second comparators and configured to determine one or more characteristics of the device under test using the first and second beats.

18. The system of claim 17, wherein the testing device is configured to determine a jitter associated with the device under test.

19. The system of claim 17, wherein the testing device is configured to determine a differential signal swing associated with the device under test by:

altering control values provided to the digital-to-analog converter to identify a toggling in the output of the second comparator that compares the first and second differential signals; and

identifying the differential signal swing based on the identified toggling.

20. The system of claim 17, wherein the testing device is configured to determine a transition time associated with the device under test by at least one of:

identifying two time periods each associated with a different one of the first beats and a different one of the second beats; and

identifying a time period between two of the second beats surrounding a single one of the first beats.