Verifying data integrity of a non-volatile memory system during data caching process
First Claim
1. A computer program product comprising a computer recordable medium having a computer readable program recorded thereon, wherein the computer readable program, when executed on a memory system controller, causes the memory system controller to:
- responsive to powering on a storage controller, wherein the storage controller comprises a volatile memory and a non-volatile memory, the volatile memory stores cache data for input/output operations performed by the storage controller, and the non-volatile memory hardens cache data from the volatile memory responsive to a power event, and concurrent with the storage controller performing input/output operations using the volatile memory, verify the non-volatile memory, wherein verifying the non-volatile memory comprises;
programming the non-volatile memory with a set of test patterns;
reading the set of test patterns from the non-volatile memory;
verifying whether the non-volatile memory stored the set of test patterns correctly; and
posting a failure status to the storage controller responsive to the non-volatile memory storing the set of test patterns incorrectly.
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Accused Products
Abstract
To ensure integrity of non-volatile flash, the controller programs the non-volatile memories with background test patterns and verifies the non-volatile memories during power on self test (POST) operation. In conjunction with verifying the non-volatile memories, the controller may routinely run diagnostics and report status to the storage controller. As part of the storage controller power up routines, the storage controller issues a POST command to the controller via an I2C register that is monitored by the storage controller. The storage controller may determine that the non-volatile flash is functional without any defects, and the controller may remove power from the non-volatile flash to extend its reliability. Periodically, in the background, the controller may run diagnostic routines to detect any failures associated with the volatile memory and the controller itself.
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Citations
20 Claims
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1. A computer program product comprising a computer recordable medium having a computer readable program recorded thereon, wherein the computer readable program, when executed on a memory system controller, causes the memory system controller to:
responsive to powering on a storage controller, wherein the storage controller comprises a volatile memory and a non-volatile memory, the volatile memory stores cache data for input/output operations performed by the storage controller, and the non-volatile memory hardens cache data from the volatile memory responsive to a power event, and concurrent with the storage controller performing input/output operations using the volatile memory, verify the non-volatile memory, wherein verifying the non-volatile memory comprises; programming the non-volatile memory with a set of test patterns; reading the set of test patterns from the non-volatile memory; verifying whether the non-volatile memory stored the set of test patterns correctly; and posting a failure status to the storage controller responsive to the non-volatile memory storing the set of test patterns incorrectly. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method, in a memory system, for verifying data integrity of a non-volatile memory system during data caching process, the method comprising:
responsive to powering on a storage controller, wherein the storage controller comprises a volatile memory and a non-volatile memory, the volatile memory stores cache data for input/output operations performed by the storage controller, and the non-volatile memory hardens cache data from the volatile memory responsive to a power event, and concurrent with the storage controller performing input/output operations using the volatile memory, verify, by a memory system controller in the memory system, the non-volatile memory, wherein verifying the non-volatile memory comprises; programming a non-volatile memory with a set of test patterns; reading the set of test patterns from the non-volatile memory; verifying whether the non-volatile memory stored the set of test patterns correctly; and posting a failure status to the storage controller responsive to the non-volatile memory storing the set of test patterns incorrectly. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A memory system comprising:
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a controller, wherein the controller detects a power event from a power supply that provides power to a storage controller and the memory system; a volatile memory, wherein the volatile memory stores cache data for input/output operations performed by a storage controller; and a non-volatile memory, wherein the controller hardens the cache data from the volatile memory for the storage controller to the non-volatile memory responsive to the power event; wherein responsive to powering on the storage controller and concurrent with the storage controller performing input/output operations using the volatile memory, the controller verifies the non-volatile memory, wherein verifying the non-volatile memory comprises; programming the non-volatile memory with a set of test patterns; reading the set of test patterns from the non-volatile memory; verifying whether the non-volatile memory stored the set of test patterns correctly; and posting a failure status to the storage controller responsive to the non-volatile memory storing the set of test patterns incorrectly. - View Dependent Claims (19, 20)
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Specification