Adaptive radio transceiver

• US 8,041,294 B2
• Filed: 06/26/2009
• Issued: 10/18/2011
• Est. Priority Date: 10/21/1999
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Chien, Ed, Khorram, Shahla, Colleran, William T., Pan, Meng-An, Rofougaran, Maryam, Darabi, Hooman, Rael, Jacob, Rofougaran, Ahmadreza, Wu, Stephen, Moloudi, Shervin, Ibrahim, Brima
• Primary Examiner(s): LY, NGHI H
• Application Number:
  US12/492,921
• Publication Number:
  US 20090286487A1
• Time in Patent Office: 844 Days
• Field of Search: 455/20, 455/323, 455/333, 327/101, 327/111, 327/337
• US Class Current: 455/20
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 2011/0494 Complex filters
• CPC Class Codes: H03H 21/0001 Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 Digital adaptive filters
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 17/104 of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1. A calibration circuit, comprising:

a voltage comparator configured to compare a first voltage and second voltage;

a digitally tunable resistor array comprising a plurality of resistors arranged in series and a plurality of first switches, each respective first switch being coupled across a different corresponding resistor;

a digitally tunable capacitor array comprising a plurality of capacitors arranged in parallel and a plurality of second switches, each respective second switch being coupled in series with a corresponding different capacitor; and

control circuitry configured to generate a plurality of digital bits, each respective digital bit controlling a different one of the corresponding first switches and second switches,

wherein the digital bits are generated by the control circuitry as a function of the comparing of the first voltage and the second voltage.

2. The calibration circuit according to claim 1, wherein the control circuitry comprises a control logic block that has an input that receives an output signal from the voltage comparator.

3. The calibration circuit according to claim 1, wherein the calibration circuit uses CMOS circuitry.

4. The calibration circuit according to claim 1, wherein the calibration circuit is part of a wireless communications device that supports wireless communications using one or more of the following:

orthogonal frequency division multiplexing, spread spectrum modulation, and direct sequence modulation.

5. The calibration circuit according to claim 1, wherein the calibration circuit is part of a wireless communications device that supports wireless communications using orthogonal frequency division multiplexing and wireless communications using spread spectrum modulation.

6. The calibration circuit according to claim 1, wherein the calibration circuit is part of a wireless communications device that supports wireless communications using orthogonal frequency division multiplexing and wireless communications using direct sequence spread spectrum modulation.

7. The calibration circuit according to claim 1, wherein the calibration circuit is part of a wireless communications device that supports wireless communications using orthogonal frequency division multiplexing and wireless communications using frequency hopping.

8. The calibration circuit according to claim 1, wherein the voltage comparator, the digitally tunable resistor array, the digitally tunable capacitor array, the first switches and the second switches are part of a single integrated circuit chip.

9. The calibration circuit according to claim 1, wherein the calibration circuit is configured to compensate for one or more of the following:

process variation, temperature variation, and power supply variation.

10. The calibration circuit according to claim 1, wherein the calibration circuit is configured to provide dynamic calibration for resistor-capacitor circuits in a transmitter circuit, a receiver circuit, or a local oscillator generator circuit of a wireless communications device.

11. The calibration circuit according to claim 1, wherein the calibration circuit is configured to provide dynamic calibration for resistor-capacitor circuits in a transmitter and a receiver of a wireless communications device.

12. The calibration circuit according to claim 1, wherein the transmitter circuit, a receiver circuit, and a local oscillator generator circuit are integrated into a single integrated circuit chip.

13. The calibration circuit according to claim 1, wherein the plurality of capacitors comprise metal-insulator-metal capacitors.

14. The calibration circuit according to claim 1, wherein each respective first switch is configured to provide a path that bypasses the corresponding resistor.

15. The calibration circuit according to claim 1, wherein each respective first switch is configured to switch the corresponding resistor in and out of the digitally tunable resistor array.

16. The calibration circuit according to claim 1, wherein each respective second switch is configured to switch the corresponding capacitor in and out of the digitally tunable capacitor array.

17. The calibration circuit according to claim 1, wherein the first voltage is a resistor voltage, and wherein the second voltage is a capacitor voltage.

18. The calibration circuit according to claim 1, wherein the first voltage or the second voltage comprises a voltage across the digitally tunable resistor array or a voltage across a digitally tunable capacitor array.

19. The calibration circuit according to claim 1, wherein the first voltage is a voltage across a reference resistor.

20. The calibration circuit according to claim 1, wherein the first voltage or the second voltage comprises a resistor voltage or a capacitor voltage.