Method of encapsulating a wafer level microdevice

• US 8,043,891 B2
• Filed: 06/03/2010
• Issued: 10/25/2011
• Est. Priority Date: 06/05/2009
• Status: Active Grant

• Current Assignee: XI'AN Yisheng Optoelectronics Technology Co., Ltd.
• Original Assignee: Shanghai Lexvu Opto Microelectronics Technology Co., Ltd.
• Inventors: Huang, Herb He
• Primary Examiner(s): Ahmadi; Mohsen
• Application Number:
  US12/793,295
• Publication Number:
  US 20100311209A1
• Time in Patent Office: 509 Days
• Field of Search: 257/E21.499, 257/E21.502, 257/E21.503, 257/E21.598
• US Class Current: 438/106
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer

Abstract

The present invention discloses a method of encapsulating a wafer level microdevice, which includes: fabricating a microdevice on top side of a first silicon wafer; depositing a first capping carbon film on the top side of the first silicon wafer; implementing a backside fabricating process of wafer from bottom side of the first silicon wafer by carrying the top side of the first silicon wafer through the first capping carbon film; removing the first capping carbon film by selective gaseous reaction with carbon; and encapsulating an encapsulation wafer onto the top side of the first silicon wafer. The present invention deposits and removes the first capping carbon film by means of chemical technology, thereby protecting the microdevice on the top side of the first wafer during implementing the backside fabricating process of wafer. The top side does not need to be protected through the encapsulation wafer before implementing the backside fabricating process of wafer, which makes the wafer thinner and convenient to be handled.

Claims

1. A method of encapsulating a wafer level microdevice comprising:

a step of fabricating the wafer level microdevice on a top side of a first silicon wafer comprises;

depositing and patterning a pattern of a sacrificial carbon film on the top side of the first silicon wafer;

depositing and patterning a pattern of a suspended structural film onto the sacrificial carbon film and the top side of the first silicon wafer to partially expose the sacrificial carbon film;

depositing a first capping carbon film on the top side of the first silicon wafer including the sacrificial carbon film and the suspended structural film to cover the wafer level microdevice; and

removing the sacrificial carbon film together with the first capping carbon film by selective gaseous reaction with carbon, so as to make the suspended structural film be suspended on the top side of the first silicon wafer including the wafer level microdevice;

implementing a backside fabricating process of the first silicon wafer from a bottom side of the first silicon wafer by carrying the top side of the first silicon wafer through the first capping carbon film; and

a step of encapsulating an encapsulation wafer onto the top side of the first silicon wafer comprises at least one of;

producing a sealing grid surrounding the wafer level microdevice on the top side of the first silicon wafer; and

encapsulating the wafer level microdevice into a capped cavity enclosed by the encapsulation wafer, the sealing grid and the top side of the first silicon wafer, by bonding the encapsulation wafer onto the sealing grid on the top side of the first silicon wafer, or producing the sealing grid on a surface of the encapsulation wafer; and

encapsulating the wafer level microdevice into the capped cavity enclosed by the encapsulation wafer, the sealing grid and the top side of the first silicon wafer, by bonding the top side of the first silicon wafer onto the sealing grid on the encapsulation wafer.

2. The method according to claim 1, wherein the wafer level microdevice fabricated on the top side of the first silicon wafer comprises a top in-out pad, and the step of implementing the backside fabricating process of wafer from the bottom side of the first silicon wafer comprises:

fabricating a through-silicon via from the bottom side of the first silicon wafer at stop of the top in-out pad;

producing a through-silicon via insulator capping side wall of the through-silicon via;

fabricating a through-silicon interconnect in the through-silicon via to connect to the top in-out pad;

producing a bottom in-out pad connected to the top in-out pad via the through-silicon interconnect.

3. The method according to claim 2, wherein the through-silicon via is produced by means of any one or combination of wet silicon etching process and dry silicon etching process.

4. The method according to claim 2, wherein the through-silicon via insulator is made from any one or combination of silicon oxide, silicon nitride, metal oxides and metal nitrides.

5. The method according to claim 1, wherein after depositing the first capping carbon film on the top side of the first silicon wafer, the method further comprises:

forming a pattern of grid through-via corresponding to the sealing grid on the first capping carbon film by using patterning process; and

depositing a sealing grid material on a surface of the first capping carbon film and within the grid through-via;

after implementing the backside fabricating process of the first silicon wafer, and before removing the first capping carbon film, the method further comprises;

etching a layer of the sealing grid material by using patterning process to form the pattern of sealing grid; and

after removing the first capping carbon film, the step of encapsulating the encapsulation wafer onto the top side of the first silicon wafer comprises;

bonding the encapsulation wafer onto the sealing grid on the top side of the first silicon wafer.

6. The method according to claim 5, wherein the step of depositing the sealing grid material on the surface of the first capping carbon film and within the grid through-via comprises:

depositing, by using any one or combination of physical vapor deposition, chemical vapor deposition and liquid-plating deposition, the sealing grid material selected from any one or combination of aluminum, nickel, copper, zinc, lead, silver and gold on the surface of the first capping carbon film and within the grid through-via to form the layer of sealing grid.

7. The method according to claim 5, wherein after removing the first capping film, the method further comprises:

placing a filling fluid into the capped cavity.

8. The method according to claim 7, wherein the filling fluid is any one or combination of hydrogen, nitrogen, helium and argon gases, or the filling fluid is liquid crystal, or the fluid contains water.

9. The method according to claim 5, wherein the sealing grid is made of any one of inorganic solid compounds, organic solid compounds and metals, or the sealing grid is electrically conductive providing means for electrically connecting the encapsulation wafer and the wafer level microdevice of the first silicon wafer.

10. The method according to claim 1, wherein the step of removing the first capping carbon film by the selective gaseous reaction with the carbon comprises:

removing the first capping carbon film by selective gaseous reaction with the carbon enhanced via plasma.

11. The method according to claim 10, wherein the step of removing the first capping carbon film by the selective gaseous reaction with the carbon comprises:

removing the first capping carbon film by means of carbon oxidation or carbon nitrification in a reactor chamber enhanced by containing plasma generated with a plasma source power.

12. The method according to claim 1, wherein the step of depositing the first capping carbon film on the top side of the first silicon wafer comprises:

placing the first silicon wafer in a reactor chamber;

introducing a carbon-containing process gas into the reactor chamber;

generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the first silicon wafer by coupling a plasma RF source power to an external portion of the reentrant path; and

coupling RF plasma bias power or bias voltage to the first silicon wafer, so as to deposit the first capping carbon film on the top side of the first silicon wafer.

13. The method according to of claim 1, wherein the first capping carbon film comprises less than 9 percent of hydrogen.

14. The method according to claim 1, wherein after implementing the backside fabricating process of the first silicon wafer from the bottom side of the first silicon wafer, and before removing the first capping carbon film by the selective gaseous reaction with the carbon, the method further comprises:

bonding a second silicon wafer on the bottom side of the first silicon wafer.

15. The method according to claim 1, wherein the suspended structural film is made of any one or combination of metals, oxides, nitrides and carbides.

16. The method according to claim 1, wherein after implementing the backside fabricating process of the first silicon wafer from the bottom side of the first silicon wafer, and before removing the first capping carbon film by the selective gaseous reaction with the carbon, the method further comprises:

depositing a second capping carbon film on the bottom side of the first silicon wafer, wherein the second capping carbon film is removed together with the first capping carbon film by the selective gaseous reaction with the carbon.

17. The method according to claim 1, wherein after removing the first capping film, the method further comprises:

placing a filling fluid into the capped cavity.

18. The method according to claim 17, wherein the filling fluid is any one or combination of hydrogen, nitrogen, helium and argon gases, or the filling fluid is liquid crystal, or the filling fluid contains water.

19. The method according to claim 1, wherein the sealing grid is made of any one of inorganic solid compounds, organic solid compounds and metals, or the sealing grid is electrically conductive providing means for electrically connecting the encapsulation wafer and the microdevice of the first silicon wafer.

20. The method according to claim 1, wherein the encapsulation wafer is at least partially transmissive to electromagnetic waves.

21. The method according to claim 1, wherein the method further comprises:

depositing electrically conductive and optically transparent coating film on the encapsulation wafer.

22. The method according to claim 21, wherein the coating film is made of indium tin oxide.

23. A method of encapsulating a wafer level microdevice comprising:

a step of fabricating the wafer level microdevice on a top side of a first silicon wafer comprises;

depositing and patterning a pattern of a sacrificial carbon film on the top side of the first silicon wafer;

depositing and patterning a pattern of a suspended structural film onto the sacrificial carbon film and the top side of the first silicon wafer to partially expose the sacrificial carbon film;

depositing a first capping carbon film on the top side of the first silicon wafer including the sacrificial carbon film and the suspended structural film to cover the wafer level microdevice; and

removing the sacrificial carbon film together with a first capping carbon film by selective gaseous reaction with carbon, so as to make the suspended structural film be suspended on the top side of the first silicon wafer including the wafer level microdevice;

wherein a step of depositing the first capping carbon film on the top side of the first silicon wafer to cover the wafer level microdevice comprises;

placing the first silicon wafer in a reactor chamber;

introducing a carbon-containing process gas into the reactor chamber;

generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the first silicon wafer by coupling a plasma RF source power to an external portion of the reentrant path; and

coupling a RF plasma bias power or a bias voltage to the first silicon wafer, so as to deposit the first capping carbon film on the top side of the first silicon wafer;

implementing a backside fabricating process of the first silicon wafer from a bottom side of the first silicon wafer by carrying the top side of the first silicon wafer through the first capping carbon film; and

encapsulating an encapsulation wafer onto the top side of the first silicon wafer.

24. The method according to claim 23, wherein the step of encapsulating the encapsulation wafer on the first silicon wafer comprises:

producing a sealing grid surrounding the wafer level microdevice on the top side of the first silicon wafer; and

encapsulating the wafer level microdevice into a capped cavity enclosed by the encapsulation wafer, the sealing grid and the top side of the first silicon wafer, by bonding the encapsulation wafer onto the sealing grid on the top side of the first silicon wafer.

25. The method according to claim 23, wherein the step of encapsulating the encapsulation wafer on the first silicon wafer comprises:

producing a sealing grid on the surface of the encapsulation wafer; and

encapsulating the wafer level microdevice into a capped cavity enclosed by the encapsulation wafer, the sealing grid and the top side of the first silicon wafer, by bonding the top side of the first silicon wafer onto the sealing grid on the encapsulation wafer.