Semiconductor device and manufacturing method thereof

• US 8,043,902 B2
• Filed: 07/30/2009
• Issued: 10/25/2011
• Est. Priority Date: 06/10/2005
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Monoe, Shigeharu, Ohnuma, Hideto, Yamazaki, Shunpei
• Primary Examiner(s): Lee; Eugene
• Assistant Examiner(s): Ho; Anthony
• Application Number:
  US12/512,075
• Publication Number:
  US 20100015764A1
• Time in Patent Office: 817 Days
• Field of Search: 257/59, 257/72, 438/99, 438/149
• US Class Current: 438/149
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78624 the source and the drain regions being asymmetrical

Abstract

The present invention provides a TFT including at least one LDD region in a self-alignment manner without forming a sidewall spacer and increasing the number of manufacturing steps. A photomask or a reticle provided with an assist pattern that is formed of a diffraction grating pattern or a semi-transmitting film and has a function of reducing light intensity is employed in a photolithography step of forming a gate electrode, an asymmetrical resist pattern having a region with a thick thickness and a region with a thickness thinner than that of the above region on one side is formed, a gate electrode having a stepped portion is formed, and an LDD region is formed in a self-alignment manner by injecting an impurity element to the semiconductor layer through the region with a thin thickness of the gate electrode.

Claims

1. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming an insulating film over a first semiconductor layer and a second semiconductor layer;

forming a conductive film over the insulating film;

forming a first resist pattern and a second resist pattern over the conductive film;

forming a first gate electrode and a second gate electrode by selectively etching the conductive film;

forming first impurity regions in each of the first semiconductor layer and the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer using each of the first gate electrode and the second gate electrode as a mask, and

forming only one second impurity region in the first semiconductor layer and a pair of second impurity regions in the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein each of the first resist pattern and the second resist pattern is formed by using a photomask, and wherein the photomask has a diffraction grating pattern or a semi-transmitting portion.

3. The method for manufacturing a semiconductor device according to claim 1, wherein each of the first resist pattern and the second resist pattern is formed by using a reticle, and wherein the reticle has a diffraction grating pattern or a semi-transmitting portion.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the first semiconductor layer is overlapped with the first gate electrode, and wherein the second semiconductor layer is overlapped with the second gate electrode.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the first impurity regions of the first semiconductor layer and the second semiconductor layer are not overlapped with the first gate electrode and the second gate electrode.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the first semiconductor layer includes a first channel formation disposed between one of the first impurity regions and the one second impurity region, and wherein the second semiconductor layer includes a second channel formation region disposed between the pair of second impurity regions.

7. The method for manufacturing a semiconductor device according to claim 1, further comprising a pixel portion and a driver circuit,

wherein the pixel portion includes a first thin film transistor including the first semiconductor layer, the insulating film, and the first gate electrode, and

wherein the driver circuit includes a second thin film transistor including the second semiconductor layer, the insulating film, and the second gate electrode.

8. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming an insulating film over a first semiconductor layer and a second semiconductor layer;

forming a conductive film over the insulating film;

forming a first resist pattern and a second resist pattern over the conductive film, each of the first resist pattern and the second resist pattern having a first portion and a second portion with a thickness thinner than that of the first portion;

forming a first gate electrode and a second gate electrode by selectively etching the conductive film, each of the first gate electrode and the second gate electrode having a first portion and a second portion with a thickness thinner than that of the first portion;

forming first impurity regions in each of the first semiconductor layer and the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer using the first portion and the second portion of each of the first gate electrode and the second gate electrode as a mask, and

forming only one second impurity region in the first semiconductor layer and a pair of second impurity regions in the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer through the second portion of each of the first gate electrode and the second gate electrode.

9. The method for manufacturing a semiconductor device according to claim 8, wherein each of the first resist pattern and the second resist pattern is formed by using a photomask, and wherein the photomask has a diffraction grating pattern or a semi-transmitting portion.

10. The method for manufacturing a semiconductor device according to claim 8, wherein each of the first resist pattern and the second resist pattern is formed by using a reticle, and wherein the reticle has a diffraction grating pattern or a semi-transmitting portion.

11. The method for manufacturing a semiconductor device according to claim 8, wherein the first semiconductor layer is overlapped with the first gate electrode, and wherein the second semiconductor layer is overlapped with the second gate electrode.

12. The method for manufacturing a semiconductor device according to claim 8, wherein the first impurity regions of the first semiconductor layer and the second semiconductor layer are not overlapped with the first gate electrode and the second gate electrode.

13. The method for manufacturing a semiconductor device according to claim 8, wherein the first semiconductor layer includes a first channel formation disposed between one of the first impurity regions and the one second impurity region, and wherein the second semiconductor layer includes a second channel formation region disposed between the pair of second impurity regions.

14. The method for manufacturing a semiconductor device according to claim 8, further comprising a pixel portion and a driver circuit,

wherein the pixel portion includes a first thin film transistor including the first semiconductor layer, the insulating film, and the first gate electrode, and

wherein the driver circuit includes a second thin film transistor including the second semiconductor layer, the insulating film, and the second gate electrode.

15. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming an insulating film over a first semiconductor layer and a second semiconductor layer;

forming a first conductive film over the insulating film;

forming a second conductive film over the first conductive film;

forming a first resist pattern and a second resist pattern over the second conductive film, each of the first resist pattern and the second resist pattern having a first portion and a second portion with a thickness thinner than that of the first portion;

forming a first gate electrode and a second gate electrode by selectively etching the first conductive film and the second conductive film, each of the first gate electrode and the second gate electrode having a first portion and a second portion with a thickness thinner than that of the first portion, the first portion of each of the first gate electrode and the second gate electrode including the first conductive film and the second conductive film, and the second portion of each of the first gate electrode and the second gate electrode including the first conductive film;

forming first impurity regions in each of the first semiconductor layer and the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer using the first portion and the second portion of each of the first gate electrode and the second gate electrode as a mask, and

forming only one second impurity region in the first semiconductor layer and a pair of second impurity regions in the second semiconductor layer by injecting an impurity element into the first semiconductor layer and the second semiconductor layer through the second portion of each of the first gate electrode and the second gate electrode.

16. The method for manufacturing a semiconductor device according to claim 15, wherein each of the first resist pattern and the second resist pattern is formed by using a photomask, and wherein the photomask has a diffraction grating pattern or a semi-transmitting portion.

17. The method for manufacturing a semiconductor device according to claim 15, wherein each of the first resist pattern and the second resist pattern is formed by using a reticle, and wherein the reticle has a diffraction grating pattern or a semi-transmitting portion.

18. The method for manufacturing a semiconductor device according to claim 15, wherein the first semiconductor layer is overlapped with the first gate electrode, and wherein the second semiconductor layer is overlapped with the second gate electrode.

19. The method for manufacturing a semiconductor device according to claim 15, wherein the first impurity regions of the first semiconductor layer and the second semiconductor layer are not overlapped with the first gate electrode and the second gate electrode.

20. The method for manufacturing a semiconductor device according to claim 15, wherein the first semiconductor layer includes a first channel formation disposed between one of the first impurity regions and the one second impurity region, and wherein the second semiconductor layer includes a second channel formation region disposed between the pair of second impurity regions.

21. The method for manufacturing a semiconductor device according to claim 15, further comprising a pixel portion and a driver circuit,

wherein the pixel portion includes a first thin film transistor including the first semiconductor layer, the insulating film, and the first gate electrode, and

wherein the driver circuit includes a second thin film transistor including the second semiconductor layer, the insulating film, and the second gate electrode.