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Nonvolatile semiconductor memory device

  • US 8,044,448 B2
  • Filed: 07/24/2009
  • Issued: 10/25/2011
  • Est. Priority Date: 07/25/2008
  • Status: Active Grant
First Claim
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1. A nonvolatile semiconductor memory device comprising:

  • a memory cell array region having memory cells connected in series;

    a control circuit region disposed below the memory cell array region; and

    an interconnection portion electrically connecting the control circuit region and the memory cell array region,the memory cell array region including;

    a plurality of first memory cell regions having the memory cells; and

    a plurality of connection regions, the interconnection portion being provided in the connection regions,the first memory cell regions being provided at a first pitch in a first direction orthogonal to a lamination direction of the memory cell array region and the control circuit region; and

    the connection regions being provided between the first memory cell regions mutually adjacent in the first direction, and at a second pitch in a second direction orthogonal to the lamination direction and the first direction.

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