Backlight dimming and LCD amplitude boost

• US 8,044,922 B1
• Filed: 12/12/2007
• Issued: 10/25/2011
• Est. Priority Date: 12/11/2002
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Lew, Stephen D., Ogrinc, Michael A.
• Primary Examiner(s): Eisen; Alexander
• Assistant Examiner(s): MARINELLI, PATRICK
• Application Number:
  US11/955,271
• Time in Patent Office: 1,413 Days
• Field of Search: 345 87-100, 345/102, 345204-211, 345690-696
• US Class Current: 345/102
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2320/0646 Modulation of illumination source brightness and image signal correlated to each other
• CPC Class Codes: G09G 2320/0653 Controlling or limiting the speed of brightness adjustment of the illumination source
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2360/16 Calculation or use of calculated indices related to luminance levels in display data
• CPC Class Codes: G09G 3/3406 Control of illumination source illumination devices structurally associated with liquid crystal cells G02F1/1336
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes

Abstract

Embodiments of the present invention generally provide m Methods and apparatus for reducing power consumption of backlit displays are described. Power consumption is reduced by dimming backlighting by a first scale factor and boosting pixel values by a second scale factor to compensate for the dimming. The scale factors may be constant values. Alternately, one or both of the scale factors may be determined based on pixel values for one or more frames to be displayed and/or one or more frames that have been displayed. For example, scale factors may be calculated based on an average linear amplitude of one or more frames of pixel values or from a maximum pixel value of one or more frames of pixel values. A graphical processing system is described including an integrated circuit capable of transforming a pixel value from a gamma-compensated space to a linear space.

Claims

1. A method for reducing power consumption of a display, the method comprising:

determining a first scale factor based on sampled pixel values of one or more frames;

dimming a backlight of the display by the first scale factor;

increasing pixel values to be displayed on the display by a second scale factor inversely proportional to the first scale factor; and

clamping the pixel values to a maximum threshold, wherein the second scale factor is greater than an inverse of the first scale factor to compensate for the clamping.

2. The method of claim 1, wherein the first scale factor and the second scale factor are constant from a first frame to a second frame.

3. The method of claim 1, wherein the first scale factor and the second scale factor vary from a first frame to a second frame.

4. The method of claim 1, wherein clamping the pixel values decreases the pixel value of at least one pixel.

5. An integrated circuit for processing graphics to be presented on a backlit display comprising:

a buffer for receiving pixels that have been gamma pre-compensated, the pixels forming a frame; and

a circuit coupled with the buffer to transform values of the pixels from a gamma space to a linear space, wherein the circuit is configured to;

determine a first scale factor based on sampled pixel values of the frame, dim a backlight of the display by the first scale factor,

increase pixel values to be displayed on the display by a second scale factor inversely proportional to the first scale factor; and

clamp the pixel values to a maximum threshold, wherein the second scale factor is greater than an inverse of the first scale factor to compensate for the clamping.

6. The integrated circuit of claim 5, wherein the circuit is further configured to transform the values of the pixels from the gamma space to the linear space by raising the values of the pixels to a power.

7. The integrated circuit of claim 6, wherein the value of the power is adjustable via an application programming interface.

8. The integrated circuit of claim 5, wherein the integrated circuit is configured to send the values of pixels transformed to the backlit display.

9. The integrated circuit of claim 8, further comprising a pulse width modulated circuit to generate an output to vary the backlighting of the backlit display.

10. The integrated circuit of claim 5, wherein clamping the pixel values decreases the pixel value of at least one pixel.

11. A non-transitory computer-readable storage medium storing instructions that when executed by a processor cause the processor to reduce power consumption of a display, by performing the steps of:

determining a first scale factor based on sampled pixel values of one or more frames;

dimming a backlight of the display by the first scale factor;

increasing pixel values to be displayed on the display by a second scale factor inversely proportional to the first scale factor; and

clamping the pixel values to a maximum threshold, wherein the second scale factor is greater than an inverse of the first scale factor to compensate for the clamping.

12. The computer-readable storage medium of claim 11, wherein the first scale factor and the second scale factor remain constant from a first frame to a second frame.

13. The computer-readable storage medium of claim 11, wherein the first scale factor and the second scale factor vary from a first frame to a second frame.

14. The computer-readable medium of claim 11, wherein clamping the pixel values decreases the pixel value of at least one pixel.