Devices and system for electrostatic discharge suppression

• US 8,045,312 B2
• Filed: 06/03/2009
• Issued: 10/25/2011
• Est. Priority Date: 09/17/2004
• Status: Expired due to Fees

• Current Assignee: Electronic Polymers Newco, Inc.
• Original Assignee: Electronic Polymers, Inc.
• Inventors: Shrier, Karen P.
• Primary Examiner(s): Barnie; Rexford
• Assistant Examiner(s): WILLOUGHBY, TERRENCE RONIQUE
• Application Number:
  US12/477,790
• Publication Number:
  US 20090237855A1
• Time in Patent Office: 874 Days
• Field of Search: 361/56, 361/91.1, 361/111, 361/117, 361/118
• US Class Current: 361/126
• CPC Class Codes: H01C 7/10 voltage responsive, i.e. varistors
• CPC Class Codes: H01C 7/13 current responsive
• CPC Class Codes: H01C 7/18 comprising a plurality of layers stacked between terminals
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48491 being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H05K 1/0256 Electrical insulation details, e.g. around high voltage areas
• CPC Class Codes: H05K 1/0259 Electrostatic discharge [ESD] protection
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 1/185 Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/0738 Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Abstract

In one embodiment, there is provided a printed circuit board including a first rigid circuit board layer having a first signal trace arrayed on it, a second rigid circuit board layer having a second signal trace arrayed on it, a first signal path coupled between the first signal trace and the second signal trace, an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device having a first electrode coupled to the first signal path, an electrostatic discharge reactance layer coupled to the first electrode, and a second electrode coupled to the electrostatic discharge layer but not coupled to the first signal path. The circuit board also having a ground plane, where the ground plane is coupled to the second electrode.

Claims

1. A printed circuit board comprising:

a first rigid circuit board layer having a first signal trace arrayed on it;

a second rigid circuit board layer having a second signal trace arrayed on it;

a first signal path coupled between the first signal trace and the second signal trace;

an electrostatic discharge device located between the first rigid circuit board layer and the second rigid circuit board layer, the electrostatic discharge device comprising;

a first electrode coupled to the first signal path;

an electrostatic discharge reactance layer coupled to the first electrode; and

a second electrode coupled to the electrostatic discharge reactance layer but not coupled to the first signal path; and

a ground plane, where the ground plane is coupled to the second electrode.

2. The printed circuit board of claim 1, wherein the ground plane is coupled to second rigid circuit board layer.

3. The printed circuit board of claim 1, wherein the first electrode and the second electrode are located on opposite sides of the electrostatic discharge reactance layer.

4. The printed circuit board of claim 3, comprising a third electrode, wherein the third electrode is located on the same side of the electrostatic discharge reactance layer as the first electrode and wherein the third electrode is not connected to the first signal path.

5. The printed circuit board of claim 4, wherein the third electrode is connected to a second signal path.

6. The printed circuit board of claim 5, wherein the first signal path is connected to a first electrical component and wherein the second signal path is connected a second electrical component.

7. The printed circuit board of claim 6, wherein the first and second electrical components are affixed to the first rigid circuit board layer.

8. The printed circuit board of claim 1, comprising a third rigid circuit board layer between the first rigid circuit board layer and the first electrode.

9. The printed circuit board of claim 1, wherein the signal path comprises a plated via.

10. The printed circuit board of claim 1, wherein the ground plane is coupled to the second electrode by a trace that extends through the second rigid circuit board layer.

11. A printed circuit board with internal discharge suppression, the printed circuit board comprising:

an electrostatic discharge reactance layer having a first side and a second side;

a first electrode coupled to the first side;

a second electrode coupled to the second side;

a plated through hole, wherein the plated through hole is coupled to the first electrode; and

a pad coupled to the plated through hole and configured to be attached to an electrical component on a surface of the printed circuit board,

wherein during an electrostatic discharge event, an electric current is passed between the first and second electrodes through the electrostatic discharge layer in the electrode overlap area, and

wherein the first electrode is located inside the printed circuit board.

12. A printed circuit board with internal discharge suppression, the printed circuit board comprising:

an electrostatic discharge reactance layer having a first side and a second side;

a first electrode coupled to the first side;

a second electrode coupled to the second side;

a plated through hole, wherein the plated through hole is coupled to the first electrode; and

a ground plane, wherein the second electrode is coupled to the ground plane,

wherein during an electrostatic discharge event, an electric current is passed between the first and second electrodes through the electrostatic discharge layer in the electrode overlap area, and

wherein the first electrode is located inside the printed circuit board.