Charging protection device
First Claim
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1. A method of fabricating shallow trench isolation silicon-on-insulator (SOI) devices, the method comprising:
- forming an insulating layer on a bulk silicon substrate;
forming an active silicon layer on the insulating layer;
forming a transistor on the active silicon layer, the transistor including source/drain regions formed in the active silicon layer;
forming a diode on the active silicon layer, the diode including two active regions;
forming an interlayer dielectric on the transistor and the diode;
forming first, second, third, and fourth contact holes through the interlayer dielectric;
filling the first, second, third, fourth contact holes with a conductive material to form first, second, third, and fourth conductive contacts; and
forming first and second metal lines on the interlayer dielectric;
wherein the first conductive contact connects the drain region of the transistor with the first metal line, the second conductive contact connects one active region of the diode with the first metal line, the third conductive contact connects the second active region of the diode with the second metal line, and the fourth conductive contact connects the second metal line to the bulk silicon layer to form a charging protection device.
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Abstract
Shallow trench isolation silicon-on-insulator (SOI) devices are formed with improved charge protection. Embodiments include an SOI film diode and a P+ substrate junction as a charging protection device. Embodiments also include a conductive path from the SOI transistor drain, through a conductive contact, a metal line, a second conductive contact, an SOI diode, isolated from the transistor, a third conductive contact, a second conductive line, and a fourth conductive contact to a P+-doped substrate contact in the bulk silicon layer of the SOI substrate.
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Citations
8 Claims
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1. A method of fabricating shallow trench isolation silicon-on-insulator (SOI) devices, the method comprising:
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forming an insulating layer on a bulk silicon substrate; forming an active silicon layer on the insulating layer; forming a transistor on the active silicon layer, the transistor including source/drain regions formed in the active silicon layer; forming a diode on the active silicon layer, the diode including two active regions; forming an interlayer dielectric on the transistor and the diode; forming first, second, third, and fourth contact holes through the interlayer dielectric; filling the first, second, third, fourth contact holes with a conductive material to form first, second, third, and fourth conductive contacts; and forming first and second metal lines on the interlayer dielectric; wherein the first conductive contact connects the drain region of the transistor with the first metal line, the second conductive contact connects one active region of the diode with the first metal line, the third conductive contact connects the second active region of the diode with the second metal line, and the fourth conductive contact connects the second metal line to the bulk silicon layer to form a charging protection device. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of fabricating a semiconductor device, the method comprising:
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forming an insulating layer on a P-type bulk silicon substrate; forming an active silicon layer on the insulating layer; forming a transistor on the active silicon layer, the transistor including source/drain regions formed in the active silicon layer; forming a diode on the active silicon layer, the diode including two active regions; etching a trench in the active silicon layer, between the transistor and the diode; filling the trench with silicon dioxide, wherein a shallow trench isolation region is formed; forming an interlayer dielectric on the transistor and the diode; etching first, second, third, and fourth contact holes through the interlayer dielectric; ion implanting Boron (B) into the bulk silicon substrate through the fourth contact hole; depositing tungsten or polysilicon in the first, second, third, fourth contact holes to form first, second, third, and fourth conductive contacts; and patterning a metal layer to form first and second metal lines on the interlayer dielectric; wherein the first conductive contact connects the drain region of the transistor with the first metal line, the second conductive contact connects one active region of the diode with the first metal line, the third conductive contact connects the second active region of the diode with the second metal line, and the fourth conductive contact connects the second metal line to the P-type bulk silicon substrate.
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Specification