Substrate-level assembly for an integrated device, manufacturing process thereof and related integrated device

• US 8,049,287 B2
• Filed: 04/14/2008
• Issued: 11/01/2011
• Est. Priority Date: 10/14/2005
• Status: Expired

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Lasalandra, Ernesto, Magugliani, Manuela, Vigna, Benedetto, Ziglioli, Federico Giovanni, Combi, Chantal, Baldo, Lorenzo, Riva, Caterina
• Primary Examiner(s): Zarneke; David
• Assistant Examiner(s): Wagner; Jenny L.
• Application Number:
  US12/102,709
• Publication Number:
  US 20080315333A1
• Time in Patent Office: 1,296 Days
• Field of Search: 257/416, 257/E27.122
• US Class Current: 257/416
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 7/0061 suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
• CPC Class Codes: B81B 7/02 containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] B81B7/04 takes precedence
• CPC Class Codes: B81C 1/0023 Packaging together an electronic processing unit die and a micromechanical structure die MEMS packages B81B7/0032; MEMS packaging processes B81C1/00261
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H04R 1/04 Structural association of microphone with electric circuitry therefor in deaf-aid sets H04R25/00
• CPC Class Codes: H04R 19/005 using semiconductor materials

Abstract

A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidly isolated from the first empty space, is provided over the respective membrane of the further integrated device.

Claims

1. A substrate-level assembly, comprising:

a device substrate of semiconductor material, having a top face and housing a first integrated device provided with an active area adjacent to the top face;

a capping substrate coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided in a position corresponding to the active area; and

electrical-contact elements for electrical connection of the first integrated device outside of the substrate-level assembly.

2. The assembly of claim 1, wherein the first integrated device is provided with a buried cavity formed within the device substrate and a membrane suspended over the buried cavity at the active area;

the first empty space being provided in a position corresponding to the membrane.

3. The assembly of claim 1, wherein an access duct is provided within the capping substrate, the access duct being fluidly connected to the first empty space and to the outside of the substrate-level assembly.

4. The assembly of claim 1, wherein the capping substrate has a first sensor cavity above the active area of the first integrated device, the first sensor cavity forming at least in part the first empty space;

in particular, the first sensor cavity having a depth in the range of 10 μ

m and 400 μ

m.

5. The assembly of claim 1, further comprising a bonding region arranged between the device substrate and the capping substrate to ensure joining thereof, and placed in contact with the top face in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device;

the first empty space being delimited, at least in part, by the bonding region.

6. The assembly of claim 5, wherein the capping substrate is flat and not patterned and the bonding region has a thickness between 6 μ

m and 100 μ

m to entirely define a thickness of the first empty space.

7. The assembly of claim 5, wherein the capping substrate includes one between:

semiconductor material, glass, ceramic, and polymeric material; and

wherein the bonding region includes glass frit or a metal or polymeric material.

8. The assembly of claim 5, wherein at least one of the capping substrate and bonding region is made of a conductive material configured to provide an electrostatic shield for the first integrated device;

the first integrated device comprising a microphone.

9. The assembly of claim 2, wherein the electrical-contact elements comprise at least one of through vias made through the device substrate and electrical-connection pads formed on a portion of the top face of the device substrate not covered by the capping substrate;

and wherein the first integrated device further comprises a buried cavity formed within the device substrate, a membrane suspended over the buried cavity, and transduction elements configured to transform a deformation of the membrane into electrical signals, the electrical-contact elements being connected to the transduction elements.

10. The assembly of claim 1, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

and a first access duct is provided within the capping substrate and fluidly connected to the first empty space and to the outside of the substrate-level assembly; and

a second access duct is provided within the device substrate in fluid communication with the buried cavity of the integrated device and with the outside of the substrate-level assembly.

11. The assembly of claim 1, wherein a first access duct and a plurality of further access ducts are provided within the capping substrate, and fluidly connected to the first empty space and to the outside of the substrate-level assembly;

the first and further access ducts being at least one of;

different size and separated by a different inter-spacing.

12. The assembly of claim 1, wherein the device substrate houses at least a further integrated device provided with a respective active area;

and wherein a further empty space is provided in a position corresponding to the respective active area of the further integrated device;

the further empty space being fluidly isolated with respect to the first empty space.

13. The assembly of claim 12, wherein the capping substrate has at least one further sensor cavity set above the respective active area of the further integrated device, and forming, at least in part, the further empty space;

the first empty space and further empty space separated in a fluid-tight manner, at least in part, by a separation portion of the capping substrate placed between the first empty space and the further empty space.

14. The assembly of claim 12, further comprising a bonding region placed between the device substrate and the capping substrate, and in contact with the top face of the device substrate in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device and the respective active area of the further integrated device;

the first empty space and the further empty space being delimited, at least in part, by the bonding region.

15. The assembly of claim 12, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity, and the further integrated device comprising a respective buried cavity formed within the device substrate and a respective membrane suspended over the respective buried cavity;

and wherein the first integrated device is a pressure sensor, and the further integrated device is an inertial sensor, the inertial sensor comprising an inertial mass arranged on the respective membrane within the further empty space.

16. The assembly of claim 15, wherein the inertial mass includes metal material, deposited directly on top of the respective membrane;

the metal material chosen from the group comprising silver, tin, copper, lead, and gold, and having a density greater than 7000 kg/m³.

17. The assembly of claim 12, wherein the first integrated device comprises a pressure sensor, and the further integrated device comprises a reference pressure sensor for the pressure sensor.

18. The assembly of claim 1, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

the first integrated device comprising a microphone sensor having a back-chamber separated from the buried cavity by a sensing diaphragm configured to move as a result of the pressure exerted thereon by sound waves reaching the buried cavity.

19. The assembly of claim 18, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

the first integrated device comprising a gas sensor and the membrane including a detection material configured to allow detecting the presence of a gaseous material;

the membrane being thermally decoupled from the device substrate.

20. The assembly of claim 1, wherein the capping substrate includes a layer grown on the device substrate, in particular by electroplating or epitaxial steps;

the capping substrate being integral to the device substrate.

21. An electronic device, comprising:

a substrate-level assembly that includes;

a device substrate of semiconductor material, having a top face and housing a first integrated device provided with an active area adjacent to the top face;

a capping substrate coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided in a position corresponding to the active area; and

electrical-contact elements for electrical connection of the first integrated device outside of the substrate-level assembly; and

a package encasing and mechanically protecting the substrate-level assembly;

wherein the package comprises a base body mechanically supporting the substrate-level assembly, and a coating region configured to coat laterally the substrate-level assembly.

22. The device of claim 21, wherein an access duct is provided within the capping substrate, the access duct being fluidly connected to the first empty space and to the outside of substrate-level assembly, wherein the coating region leaves uncovered and accessible from the outside:

a top surface of the capping substrate defining part of a first outer face of the package, and

the access duct.

23. The device of claim 21, wherein the package is of an LGA, SO, QFN or BGA type, and has contact pads carried by a surface of the base body, which is not in contact with the substrate-level assembly and defines a second outer face of the package.

24. The device of claim 21, further comprising a circuit die electrically coupled to the substrate-level assembly and encased by the package:

wherein the device substrate and circuit die are mechanically coupled to the base body through a respective adhesion layer, and arranged side by side.

25. The device of claim 21, further comprising a circuit die electrically coupled to the substrate-level assembly and encased by the package;

the circuit die being mechanically coupled to the base body, and the device substrate being mechanically coupled to the circuit die in a stacked manner.

26. The device of claim 21, further comprising an access duct extending through the base body and reaching the substrate-level assembly at a surface thereof, opposite to the top face.

27. The device of claim 21, wherein the electronic device comprises one of:

a tire-pressure monitoring system, a blood-pressure monitoring system, an ink-ejection system, and a mobile phone.

28. A process for manufacturing a substrate-level assembly, comprising:

providing a device substrate of semiconductor material, having a top face;

forming a first integrated device within the device substrate and with an active area adjacent to the top face;

coupling a capping substrate to the device substrate above the top face so as to cover the first integrated device, the coupling comprising forming a first empty space in a position corresponding to the active area; and

forming electrical-contact elements for electrical connection of the first integrated device with the outside of the substrate-level assembly.

29. The process of claim 28, wherein forming a first integrated device further comprises forming a buried cavity within the device substrate and a membrane suspended over the buried cavity, the first empty space formed in a position corresponding to the membrane.

30. The process of claim 28, further comprising forming in the capping substrate access duct fluidly connected to the first empty space and to the outside of the substrate-level assembly.

31. The process of claim 28, wherein forming a first empty space comprises forming in the capping substrate a sensor cavity above the active area of the first integrated device.

32. The process of claim 28, wherein the mechanically coupling comprises:

forming a bonding region between the device substrate and the capping substrate and in contact with the top face of the device substrate in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device; and

joining the device substrate and the capping substrate via the bonding region; and

wherein the first empty space is delimited, at least in part, by the bonding region.

33. The process of claim 28, wherein forming a first integrated device further comprises forming a buried cavity within the device substrate, and a membrane suspended over the buried cavity, and forming transducer elements configured to transform into electrical signals a deformation of the membrane, and forming electrical-contact elements comprises:

forming at least one between through vias through the device substrate, and forming electrical-connection pads on a portion of the top face of the device substrate not covered by the capping substrate; and

connecting the through vias or the electrical-connection pads to the transduction elements.

34. The process of claim 28, wherein forming a first integrated device further comprises forming a buried cavity within the device substrate, and a membrane suspended over the buried cavity;

further comprising forming in the capping substrate a first access duct, fluidly connected to the first empty space and to the outside of the substrate-level assembly, and forming in the device substrate a second access duct in fluid communication with the buried cavity of the integrated device and with the outside of the substrate-level assembly.

35. The process of claim 28, further comprising forming a first access duct and a plurality of further access ducts within the capping substrate and fluidly connected to the first empty space and to the outside of the substrate-level assembly;

in particular, the first and further access ducts being of different size or a different inter-spacing being provided therebetween or a combination of different size and different inter-spacing.

36. The process of claim 28, further comprising:

forming in the device substrate at least one further integrated device provided with a respective active area;

the coupling further comprising forming a further empty space in a position corresponding to the respective active area of the further integrated device;

the further empty space being fluidly isolated from the first empty space.

37. The process of claim 36, wherein forming a further empty space comprises forming at least a further sensor cavity in the capping substrate, over the respective active area of the further integrated device;

the forming at least a further sensor cavity comprising separating the first empty space and the further empty space via a separation portion of the capping substrate.

38. The process of claim 36, wherein the coupling comprises forming a bonding region set between the device substrate and the capping substrate and in contact with the top face in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device and the respective active area of the further integrated device;

the first empty space and the further empty space being delimited, at least in part, by the bonding region.

39. The process of claim 36, wherein forming a first integrated device comprises forming a buried cavity within the device substrate and a membrane suspended over the buried cavity, and forming a further integrated device comprises forming a respective buried cavity within the device substrate and a respective membrane suspended over the respective buried cavity;

and wherein forming a first integrated device comprises forming a pressure sensor, and forming at least one further integrated device comprises forming an inertial sensor that comprises forming an inertial mass on the respective membrane and within the further empty space.

40. The process of claim 39, wherein forming an inertial mass comprises depositing directly on top of the respective membrane metal material chosen in the group comprising silver, tin, copper, lead, and gold, and having a density higher than 7000 kg/m³.

41. The process of claim 36, wherein forming a first integrated device comprises forming a pressure sensor, and forming at least one further integrated device comprises forming a reference pressure sensor for the pressure sensor.

42. The process of claim 28, wherein forming a first integrated device comprises forming a microphone sensor that includes a buried cavity within the device substrate, a membrane suspended over the buried cavity, and a back-chamber separated from the buried cavity by a sensing diaphragm configured to move as a result of pressure exerted thereon by sound waves reaching the buried cavity.

43. The process of claim 28, wherein forming a first integrated device comprises forming a gas sensor, and in particular a buried cavity within the device substrate, and a membrane suspended over the buried cavity;

forming the membrane comprising forming a detection material configured to allow detecting the presence of a gaseous material, the membrane being thermally decoupled from the device substrate.

44. The process of claim 28, wherein coupling the capping substrate comprises growing a layer of material on the device substrate by electroplating or epitaxial steps;

the capping substrate being integral to the device substrate.

45. A process for manufacturing an electronic device, comprising:

forming a substrate-level assembly, the forming including;

providing a device substrate of semiconductor material, having a top face;

forming a first integrated device within the device substrate and with an active area adjacent to the top face;

coupling a capping substrate to the device substrate above the top face so as to cover the first integrated device, the coupling comprising forming a first empty space in a position corresponding to the active area and

forming electrical-contact elements for electrical connection of the first integrated device with the outside of the substrate-level assembly; and

encasing the substrate-level assembly in a package, for coating and mechanically protecting the substrate-level assembly;

wherein the encasing comprises providing a base body to support the substrate-level assembly, and coating laterally the substrate-level assembly with a coating region.

46. The process of claim 45, further comprising providing an access duct within the capping substrate, the access duct being fluidly connected to the first empty space and to the outside of the substrate-level assembly, wherein the coating region is configured to leave uncovered and accessible from the outside:

a top surface of the capping substrate defining part of a first outer face of the package, and

the access duct.

47. The process of claim 45, comprising forming contact pads at a surface of the base body, which is not in contact with the substrate-level assembly and defines a second outer face of the package.

48. The process of claim 45, further comprising electrically coupling a circuit die to the substrate-level assembly within the package;

and wherein the encasing further comprises mechanically coupling, arranged side by side, the device substrate and circuit die to the base body through a respective adhesion layer.

49. The process of claim 45, further comprising electrically coupling a circuit die to the substrate-level assembly within the package;

and wherein the encasing further comprises mechanically coupling the circuit die to the base body, and said mechanically coupling the device substrate to the circuit die in a stacked manner.

50. The process of claim 45, further comprising forming an access duct extending through the base body and reaching the substrate-level assembly at a surface thereof, opposite to the top face.

51. An assembly comprising:

an article, and

a sensor assembly adapted to monitor at least one condition of the article, the sensor assembly comprising;

a device substrate of semiconductor material, having a top face and housing a first integrated device provided with an active area adjacent to the top face;

a capping substrate coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided in a position corresponding to the active area; and

electrical-contact elements for electrical connection of the first integrated device outside of the substrate-level assembly.

52. The assembly of claim 51, wherein the first integrated device is provided with a buried cavity formed within the device substrate and a membrane suspended over the buried cavity at the active area;

the first empty space being provided in a position corresponding to the membrane.

53. The assembly of claim 51, wherein a first access duct is provided within the capping substrate, the first access duct being fluidly connected to the first empty space and to the outside of the substrate-level assembly.

54. The assembly of claim 51, wherein the capping substrate has a first sensor cavity above the active area of the first integrated device, the first sensor cavity forming at least in part the first empty space;

the first sensor cavity having a depth in the range of 10 μ

m and 400 μ

m.

55. The assembly of claim 51, further comprising a bonding region arranged between the device substrate and the capping substrate to ensure joining thereof, and placed in contact with the top face in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device;

the first empty space being delimited, at least in part, by the bonding region.

56. The assembly of claim 55, wherein the capping substrate is flat and not patterned and the bonding region has a thickness between 6 and 100 μ

m to entirely define a thickness of the first empty space.

57. The assembly of claim 52, wherein the electrical-contact elements comprise at least one through via made through the device substrate;

and electrical-connection pads formed on a portion of the top face of the device substrate not covered by the capping substrate; and

wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity, and transduction elements configured to transform a deformation of the membrane into electrical signals, the electrical-contact elements being connected to the transduction elements.

58. The assembly of claim 51, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

and a first access duct is provided within the capping substrate and is fluidly connected to the first empty space and to the outside of the substrate-level assembly and a second access duct is provided within the device substrate in fluid communication with the buried cavity of the integrated device and with the outside of the substrate-level assembly.

59. The assembly of claim 51, wherein a first access duct and a plurality of further access ducts are provided within the capping substrate, and fluidly connected to the first empty space and to the outside of the substrate-level assembly;

the first and further access ducts being at least one of different size and separated by a different inter-spacing.

60. The assembly of claim 51, wherein the device substrate houses at least a further integrated device provided with a respective active area;

and wherein a further empty space is provided in a position corresponding to the respective active area of the further integrated device;

the further empty space being fluidly isolated with respect to the first empty space.

61. The assembly of claim 60, wherein the capping substrate has at least one further sensor cavity set above the respective active area of the further integrated device, and forming, at least in part, the further empty space;

the first empty space and further empty space being separated in a fluid-tight manner, at least in part, by a separation portion of the capping substrate placed between the first empty space and the further empty space.

62. The assembly of claim 60, further comprising a bonding region placed between the device substrate and the capping substrate, and in contact with the top face of the device substrate in such a manner as to surround, without being superimposed thereon, the active area of the first integrated device and the respective active area of the further integrated device;

the first empty space and the further empty space being delimited, at least in part, by the bonding region.

63. The assembly of claim 58, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity, and the further integrated device comprising a respective buried cavity formed within the device substrate and a respective membrane suspended over the respective buried cavity;

and wherein the first integrated device is a pressure sensor, and the further integrated device is an inertial sensor, the inertial sensor comprising an inertial mass arranged on the respective membrane within the further empty space.

64. The assembly of claim 60, wherein the first integrated device comprises a pressure sensor, and the further integrated device comprises a reference pressure sensor for the pressure sensor.

65. The assembly of claim 51, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

the first integrated device comprising a microphone sensor having a back-chamber separated from the buried cavity by a sensing diaphragm configured to move as a result of the pressure exerted thereon by sound waves reaching the buried cavity.

66. The assembly of claim 65, wherein the first integrated device further comprises a buried cavity formed within the device substrate and a membrane suspended over the buried cavity;

the first integrated device comprising a gas sensor and the membrane including a detection material configured to allow detecting the presence of a gaseous material;

the membrane being thermally decoupled from the device substrate.

67. The assembly of claim 51, wherein the capping substrate includes a layer grown on the device substrate, in particular by electroplating or epitaxial steps;

the capping substrate being integral to the device substrate.