Battery processor circuitry with separate public and private bus

• US 8,051,285 B2
• Filed: 09/22/2009
• Issued: 11/01/2011
• Est. Priority Date: 03/08/2005
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Shankar, Narendar, Vanyo, Todd, Paksoy, Erdal
• Primary Examiner(s): LANIER, BENJAMIN E
• Application Number:
  US12/564,590
• Publication Number:
  US 20100011218A1
• Time in Patent Office: 770 Days
• Field of Search: None
• US Class Current: 713/168
• CPC Class Codes: G06F 21/70 Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 21/81 by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
• CPC Class Codes: H04L 63/08 for authentication of entities cryptographic mechanisms or cryptographic arrangements for entity authentication H04L9/32
• CPC Class Codes: H04L 9/0822 using key encryption key
• CPC Class Codes: H04L 9/14 using a plurality of keys or algorithms
• CPC Class Codes: H04L 9/3271 using challenge-response

Abstract

Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In one embodiment, the system for providing a battery module with secure identity information includes: (1) a tamper resistant processing environment 200 located within the battery module 110 and (2) a key generator configured to generate a key based on an identity of the battery module 110 and cause the key to be stored within the tamper resistant processing environment 200.

Claims

1. An integrated circuit adapted to be incorporated in a battery, comprising:

A. a public bus adapted to be connected with a data bus of a battery interface that includes the data bus and a power bus;

B. a public non-volatile memory connected with the public bus and adapted to contain an encrypted identity key;

C. a public RAM connected with the public bus;

D. a private bus separate from the data bus;

E. a private non-volatile memory connected only with the private bus and adapted to contain an unencrypted identity key;

F. a private RAM connected only with the private bus; and

G. processor circuitry separately connected with the public bus and the private bus, the processor circuitry being adapted to combine the unencrypted identity key with challenge data received over the public bus, and to send signed challenge data over the public bus.