Temperature-compensated ferroelectric capacitor device, and its fabrication

• US 8,053,251 B2
• Filed: 08/19/2005
• Issued: 11/08/2011
• Est. Priority Date: 09/26/2002
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Drab, John J., Dougherty, T. Kirk
• Primary Examiner(s): Landau; Matthew
• Assistant Examiner(s): Crawford; Latanya N
• Application Number:
  US11/207,925
• Publication Number:
  US 20060189003A1
• Time in Patent Office: 2,272 Days
• Field of Search: 438/3, 438/393, 438/396, 257/295, 257/296, 257/E21.663, 257/E21.664, 257/E21.009, 361/274.1, 361/313, 361/321.2
• US Class Current: 438/3
• CPC Class Codes: H01L 27/0805 Capacitors only
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material
• CPC Class Codes: H10B 53/00 Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
• CPC Class Codes: H10B 53/30 characterised by the memory core region

Abstract

A temperature-compensated capacitor device has ferroelectric properties and includes a ferroelectric capacitor using a ferroelectric material such as a metal oxide ferroelectric material, a negative-temperature-variable capacitor using a negative-temperature-coefficient-of-capacitance material such as a metal oxide paraelectric material, and an electrical series connection between the negative-temperature-variable capacitor and the ferroelectric capacitor. The temperature-compensated capacitor device may be formed as an integrated layered structure, or as separate capacitors with a discrete electrical connection therebetween.

Claims

1. A method comprising the steps of:

providing a memory device operable to store and retrieve information;

providing a temperature-compensated capacitor device incorporated into the memory device, the temperature-compensated capacitor device including

a ferroelectric capacitor comprising a ferroelectric material,

a negative-temperature-variable capacitor comprising a negative-temperature-coefficient-of-capacitance material, the negative-temperature-variable capacitor having a capacitance that decreases with increasing temperature over an operating range of from 25°

C. to 125°

C., the negative-temperature-variable capacitor matched to the ferroelectric capacitor such that a combined capacitance of the temperature-compensated capacitor device remains generally temperature invariant over the operating temperature range of from 25°

C. to 125°

C., and

an electrical series connection between the negative-temperature-variable capacitor and the ferroelectric capacitor.

2. The method of claim 1, wherein the electrical series connection comprises a direct physical contact between the ferroelectric capacitor and the negative-temperature-variable capacitor.

3. The method of claim 1, wherein the electrical series connection comprises a discrete electrical connection extending between the ferroelectric capacitor and the negative-temperature-variable capacitor.

4. The method of claim 1, wherein the negative-temperature-coefficient-of-capacitance material is in direct, facing contact with the ferroelectric material.

5. The method of claim 1, wherein the ferroelectric material is a metal oxide ferroelectric material.

6. The method of claim 1, wherein the ferroelectric material is a metal oxide ferroelectric material selected from the group consisting of lead titanate, lead zirconate titanate, lead lanthanum zirconate titanate, barium titanate, strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth tantalate niobate, and bismuth lead titanate.

7. The method of claim 1 wherein the negative-temperature-coefficient-of-capacitance material is a paraelectric material.

8. The method of claim 1, wherein the negative-temperature-coefficient-of-capacitance material is a metal oxide negative-temperature-coefficient-of-capacitance material.

9. The method of claim 1, wherein the negative-temperature-coefficient-of-capacitance material is a metal oxide negative-temperature-coefficient-of-capacitance material selected from the group consisting of strontium titanate and barium strontium titanate.

10. The method of claim 1, wherein the negative-temperature-coefficient-of-capacitance material is barium strontium titanate.

11. The method of claim 1, wherein the memory device is operable over an operating temperature range of from 25°

C. to 125°

C.

12. The method of claim 1, wherein the ferroelectric material is strontium bismuth tantalate niobate and the negative-temperature-coefficient-of-capacitance material is barium strontium titanate.

13. A method comprising the steps of:

providing a memory device operable to store and retrieve information;

providing a temperature-compensated capacitor device incorporated into the memory device, the temperature-compensated capacitor device including

a ferroelectric capacitor comprising a ferroelectric material, wherein the ferroelectric material is a metal oxide ferroelectric material selected from the group consisting of lead titanate, lead zirconate titanate, lead lanthanum zirconate titanate, barium titanate, strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth tantalate niobate, and bismuth lead titanate,

a negative-temperature-variable capacitor comprising barium strontium titanate negative-temperature-coefficient-of-capacitance material, the negative-temperature-variable capacitor having a capacitance that decreases with increasing temperature over an operating range of from 25°

C. to 125°

C., the negative-temperature-variable capacitor matched to the ferroelectric capacitor such that a combined capacitance of the temperature-compensated capacitor device remains generally temperature invariant over the operating temperature range of from 25°

C. to 125°

C., and

an electrical series connection between the negative-temperature-variable capacitor and the ferroelectric capacitor.

14. The method of claim 13, wherein the electrical series connection comprises a direct physical contact between the ferroelectric capacitor and the negative-temperature-variable capacitor.

15. The method of claim 13, wherein the the memory device is operable over an operating temperature range of from 25°

C. to 125°

C.

16. The method of claim 13, wherein the ferroelectric material is strontium bismuth tantalate niobate.

17. A method comprising the steps of:

providing a memory device operable to store and retrieve information;

providing a temperature-compensated capacitor device incorporated into the memory device, the temperature-compensated capacitor device including

a ferroelectric capacitor comprising a ferroelectric material, wherein the ferroelectric material is a metal oxide ferroelectric material selected from the group consisting of lead titanate, lead zirconate titanate, lead lanthanum zirconate titanate, barium titanate, strontium bismuth tantalate, strontium bismuth niobate, strontium bismuth tantalate niobate, and bismuth lead titanate,

a negative-temperature-variable capacitor comprising barium strontium titanate negative-temperature-coefficient-of-capacitance material, the negative-temperature-variable capacitor having a capacitance that decreases with increasing temperature over an operating range of from 25°

C. to 125°

C., the negative-temperature-variable capacitor matched to the ferroelectric capacitor such that a combined capacitance of the temperature-compensated capacitor device remains generally temperature invariant over the operating temperature range of from 25°

C. to 125°

C., and

an electrical series connection between the negative-temperature-variable capacitor and the ferroelectric capacitor, wherein the electrical series connection comprises a discrete electrical connection extending between the ferroelectric capacitor and the negative-temperature-variable capacitor.

18. A method comprising the steps of:

fabricating the temperature-compensated capacitor by

providing a first electrode layer,

depositing a ferroelectric precursor layer of a ferroelectric precursor material on the first electrode layer,

reacting the ferroelectric precursor layer to produce a ferroelectric layer,

depositing a negative-temperature-variable precursor layer of a negative-temperature-coefficient-of-capacitance material on the ferroelectric layer,

reacting the negative-temperature-variable precursor layer to form a paraelectric layer, the paraelectric layer having a capacitance that decreases with increasing temperature over an operating range of from 25°

C. to 125°

C., the paraelectric layer matched to the ferroelectric layer such that a combined capacitance of the temperature-compensated capacitor remains generally temperature invariant over the operating temperature range of from 25°

C. to 125°

C., wherein the ferroelectric layer comprises strontium bismuth tantalate niobate and the paralectric layer comprises barium strontium titanate,

placing a second electrode layer on the paraelectric layer, and

operably electrically connecting a memory readout circuit to the ferroelectric layer and to the paraelectric layer; and

incorporating the temperature-compensated capacitor in a memory device operable to store and retrieve information over an operating temperature range.

19. The method of claim 18, wherein the step of providing the first electrode layer includes the step of

depositing the first electrode layer, and

wherein the step of placing a second electrode layer includes the step of depositing the second electrode layer.

20. The method of claim 18, wherein the step of depositing the ferroelectric precursor layer includes the step of

depositing a precursor of a metal oxide ferroelectric material.

21. The method of claim 18, wherein the step of depositing the temperature-variable precursor layer includes the step of

depositing a precursor of a metal oxide negative-temperature-coefficient-of-capacitance material.

22. The method of claim 18, wherein the memory device is operable over an operating temperature range of from 25°

C. to 125°

C.