Method of forming metal electrode of system in package

• US 8,053,362 B2
• Filed: 06/17/2008
• Issued: 11/08/2011
• Est. Priority Date: 06/22/2007
• Status: Active Grant

• Current Assignee: Adeia Semiconductor Technologies LLC (f/k/a Invensas Corporation) (Adeia Inc.)
• Original Assignee: Dongbu HiTek Co., Ltd. (DB HiTek Co., Ltd.)
• Inventors: Hwang, Jong-Taek
• Primary Examiner(s): Wilczewski; Mary
• Assistant Examiner(s): THOMAS, TONIAE M
• Application Number:
  US12/140,558
• Publication Number:
  US 20080318410A1
• Time in Patent Office: 1,239 Days
• Field of Search: 438/109, 438/455, 438/667, 438/672, 438/675, 438/687, 257/74, 257/686, 257/698, 257/773, 257/777, 257/E21.011, 257/E21.585
• US Class Current: 438/667
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method for forming a metal electrode of a system in package of a system in package including a multilayer semiconductor device having semiconductor devices stacked in a plurality of layers. The method may include forming a through hole extending through the plurality of layers, forming a combustible material layer having high viscosity at a lower portion of the through hole in order to seal the lower portion thereof, and forming a through electrode by filling copper in the through hole. There is an effect of efficiently forming a through electrode having a large depth corresponding to the height of stacked semiconductor devices in the system in package. Filling copper in a through hole having a large depth-to-width ratio may be efficiently done by OSP coating, electrolysis copper plating, and electro Cu plating processes.

Claims

1. A method comprising:

providing a system-in-package including a multilayer semiconductor device having semiconductor devices stacked in a plurality of layers; and

then

forming a through hole extending through the plurality of layers; and

then

forming a combustible material having a high viscosity at a lowermost portion of the through hole; and

then

forming a through electrode by filling copper in the through hole.

2. The method of claim 1, wherein forming the through electrode comprises:

forming a copper seed layer on an entire surface of the multilayer semiconductor device and on inner walls of the through hole; and

then

forming a copper layer in the through hole and on an entire surface of the multilayer semiconductor device and on inner walls of the through hole; and

then

removing a portion of the copper layer formed on an uppermost portion of the multilayer semiconductor device; and

then

removing the combustible material layer and a portion of the copper layer formed on a lowermost portion of the combustible material layer.

3. The method of claim 2, wherein removing the portion of the copper layer formed on an uppermost portion of the multilayer semiconductor device is performed using a planarization process.

4. The method of claim 2, wherein removing the portion of the copper layer formed on the uppermost portion of the multilayer semiconductor device is performed by a chemical mechanical polishing.

5. The method of claim 2, wherein the copper seed layer is formed having a thickness in a range between 50 Å

to 1500 Å

.

6. The method of claim 2, wherein the copper seed layer is formed using an electrolysis plating method.

7. The method of claim 2, wherein the copper layer is formed in the through hole using electro plating.

8. The method of claim 2, wherein removing the combustible material layer and the portion of the copper layer formed on the lowermost portion of the combustible material layer is performed by heat treatment.

9. The method of claim 8, wherein the heat treatment is conducted at a temperature range of between 100°

C. to 300°

C. and for a time period between 30 to 100 minutes.

10. The method of claim 1, wherein the combustible material layer comprises an organic solder preservative.

11. The method of claim 1, wherein the through hole is formed by reactive ion etching.

12. The method according to claim 1, wherein the through hole has a large depth-to-width ratio.

13. A method comprising:

providing a system-in-package including a multilayer semiconductor device having semiconductor devices stacked in a plurality of layers; and

then

forming a through hole extending through the plurality of layers; and

then

sealing a lowermost end of the through hole; and

then

forming a through electrode composed of copper in the through hole,

wherein sealing the lowermost end of the through hole comprises forming a layer composed of a combustible material on the lowermost end of the through hole.

14. The method of claim 13, wherein the combustible material has high viscosity.

15. The method of claim 14, wherein the combustible material comprises an organic material.

16. The method of claim 13, wherein forming the through electrode comprises:

forming a copper seed layer on lowermost and uppermost surfaces of the multilayer semiconductor device and on inner walls of the through hole; and

then

forming a copper layer on the copper seed layer; and

then

removing a portion of the copper layer formed on the uppermost surface of the multilayer semiconductor device; and

then

removing the combustible material layer and a portion of the copper layer formed on the lowermost surface of the combustible material layer.

17. A method comprising:

providing a system-in-package including a multilayer semiconductor device having semiconductor devices stacked in a plurality of layers; and

then

forming a through hole extending through the plurality of layers; and

then forming a layer composed of an organic material on the lowermost surface of the multilayer semiconductor device and on a lowermost end of the through hole to seal the lowermost end of the through hole; and

then

forming a copper seed layer on the lowermost surface of the layer composed of an organic material, on inner walls of the through hole and on the uppermost surface of the multilayer semiconductor device; and

then

forming a copper layer on the copper seed layer; and

then

removing a portion of the copper layer formed on the uppermost portion of the multilayer semiconductor device; and

then

removing the layer composed of an organic material and the copper layer formed on the lowermost portion of the combustible material layer to thereby form a through electrode.

18. The method of claim 17, wherein the layer composed of an organic material is combustible and has high viscosity.

19. The method of claim 17, wherein the layer composed of an organic material comprises an organic solder preservative material.