Semiconductor device having thin film transistor

• US 8,053,781 B2
• Filed: 01/20/2011
• Issued: 11/08/2011
• Est. Priority Date: 03/06/2001
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kusuyama, Yoshihiro, Suzawa, Hideomi, Yamazaki, Shunpei
• Primary Examiner(s): Chambliss; Alonzo
• Application Number:
  US13/010,089
• Publication Number:
  US 20110114959A1
• Time in Patent Office: 292 Days
• Field of Search: None
• US Class Current: 257/72
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/06 characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate

Abstract

The present invention has an object to provide an active-matrix liquid crystal display device that realizes the improvement in productivity as well as in yield. In the present invention, a laminate film comprising the conductive film comprising metallic material and the second amorphous semiconductor film containing an impurity element of one conductivity type and the amorphous semiconductor film is selectively etched with the same etching gas to form a side edge of the first amorphous semiconductor film 1001 into a taper shape. Thereby, a coverage problem of a pixel electrode 1003 can be solved and an inverse stagger type TFT can be completed with three photomask. Selected figure is FIG. 15.

Claims

1. A semiconductor device comprising:

a gate wiring formed over an insulating surface;

an insulating film formed over the gate wiring;

a first semiconductor film formed over the insulating film;

a source region and a drain region each provided in a second semiconductor film containing an impurity element of one conductivity type, formed over the first semiconductor film;

a source wiring provided on the source region;

an electrode provided on the drain region; and

a pixel electrode formed so as to partially overlap and be in contact with the electrode,

wherein at least an outer end of the first semiconductor film has a tapered shape,

wherein an outer side edge of a top surface of the first semiconductor film is aligned with an outer side edge of a bottom surface of the second semiconductor film,

wherein the first semiconductor film has a depression between the source region and the drain region,

wherein an inner side edge of the top surface of the first semiconductor film is aligned with an inner side edge of the bottom surface of the second semiconductor film, and

wherein a film thickness of the insulating film is thinner than a film thickness of the gate wiring.

2. The semiconductor device according to claim 1, wherein the taper angle of the outer end of the first semiconductor film is in the range of 5°

to 45°

.

3. The semiconductor device according to claim 1,

wherein at least an outer end of the second semiconductor film has a tapered shape, and

wherein a taper angle of the second semiconductor film is different from that of the first semiconductor film.

4. The semiconductor device according to claim 3, wherein the taper angle of the second semiconductor film is larger than that of the first semiconductor film.

5. The semiconductor device according to claim 1, wherein an outer side surface of the second semiconductor film is perpendicular to the insulating surface.

6. The semiconductor device according to claim 1, wherein a region of the first semiconductor film overlapping with the gate wiring and not overlapping with the source region or the drain region is thinner than another region of the first semiconductor film and is tapered to become thinner toward a center of the region.

7. The semiconductor device according to claim 1, wherein the first semiconductor film is one selected from the group consisting of an amorphous semiconductor film, a microcrystalline semiconductor film, and a compound semiconductor film with an amorphous structure.

8. The semiconductor device according to claim 1, wherein the second semiconductor film is an amorphous semiconductor film or a microcrystalline semiconductor film.

9. The semiconductor device according to claim 1, wherein the gate wiring contains a metal material selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, neodymium, aluminum, copper, silver, gold, and platinum.

10. The semiconductor device according to claim 1, wherein the source wiring and the electrode contains a metal material selected from the group consisting of aluminum, titanium, molybdenum, copper, tantalum, chromium, and nickel.

11. A semiconductor device comprising:

a gate wiring formed over an insulating surface;

an insulating film formed over the gate wiring;

a first semiconductor film formed over the insulating film;

a source region and a drain region each provided in a second semiconductor film containing an impurity element of one conductivity type, formed over the first semiconductor film;

a source wiring provided on the source region;

an electrode provided on the drain region; and

a pixel electrode formed so as to partially overlap and be in contact with the electrode,

wherein at least an outer end of the first semiconductor film has a tapered shape,

wherein an outer side edge of a top surface of the first semiconductor film is aligned with an outer side edge of a bottom surface of the second semiconductor film,

wherein the first semiconductor film has a depression between the source region and the drain region,

wherein an inner side edge of the top surface of the first semiconductor film is aligned with an inner side edge of the bottom surface of the second semiconductor film, and

wherein a side surface of the depression is tapered.

12. The semiconductor device according to claim 11, wherein the taper angle of the outer end of the first semiconductor film is in the range of 5°

to 45°

.

13. The semiconductor device according to claim 11,

wherein at least an outer end of the second semiconductor film has a tapered shape, and

wherein a taper angle of the second semiconductor film is different from that of the first semiconductor film.

14. The semiconductor device according to claim 13, wherein the taper angle of the second semiconductor film is larger than that of the first semiconductor film.

15. The semiconductor device according to claim 11, wherein an outer side surface of the second semiconductor film is perpendicular to the insulating surface.

16. The semiconductor device according to claim 11, wherein a region of the first semiconductor film overlapping with the gate wiring and not overlapping with the source region or the drain region is thinner than another region of the first semiconductor film and is tapered to become thinner toward a center of the region.

17. The semiconductor device according to claim 11, wherein the first semiconductor film is one selected from the group consisting of an amorphous semiconductor film, a microcrystalline semiconductor film, and a compound semiconductor film with an amorphous structure.

18. The semiconductor device according to claim 11, wherein the second semiconductor film is an amorphous semiconductor film or a microcrystalline semiconductor film.

19. The semiconductor device according to claim 11, wherein the gate wiring contains a metal material selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, neodymium, aluminum, copper, silver, gold, and platinum.

20. The semiconductor device according to claim 11, wherein the source wiring and the electrode contains a metal material selected from the group consisting of aluminum, titanium, molybdenum, copper, tantalum, chromium, and nickel.

21. A semiconductor device comprising:

a gate wiring formed over an insulating surface;

an insulating film formed over the gate wiring;

a first semiconductor film formed over the insulating film;

a source region and a drain region each provided in a second semiconductor film containing an impurity element of one conductivity type, formed over the first semiconductor film;

a source wiring provided on the source region;

an electrode provided on the drain region; and

a pixel electrode formed so as to partially overlap and be in contact with the electrode,

wherein at least an outer end of the first semiconductor film has a tapered shape,

wherein an outer side edge of a top surface of the first semiconductor film is aligned with an outer side edge of a bottom surface of the second semiconductor film,

wherein the first semiconductor film has a depression between the source region and the drain region,

wherein an inner side edge of the top surface of the first semiconductor film is aligned with an inner side edge of the bottom surface of the second semiconductor film,

wherein an inner side surface of the second semiconductor film and a side surface of the source wiring are perpendicular to the insulating surface, and

wherein a side surface of the depression is tapered.

22. The semiconductor device according to claim 21, wherein the taper angle of the outer end of the first semiconductor film is in the range of 5°

to 45°

.

23. The semiconductor device according to claim 21,

wherein at least an outer end of the second semiconductor film has a tapered shape, and

wherein a taper angle of the second semiconductor film is different from that of the first semiconductor film.

24. The semiconductor device according to claim 23, wherein the taper angle of the second semiconductor film is larger than that of the first semiconductor film.

25. The semiconductor device according to claim 21, wherein an outer side surface of the second semiconductor film is perpendicular to the insulating surface.

26. The semiconductor device according to claim 21, wherein a region of the first semiconductor film overlapping with the gate wiring and not overlapping with the source region or the drain region is thinner than another region of the first semiconductor film and is tapered to become thinner toward a center of the region.

27. The semiconductor device according to claim 21, wherein the first semiconductor film is one selected from the group consisting of an amorphous semiconductor film, a microcrystalline semiconductor film, and a compound semiconductor film with an amorphous structure.

28. The semiconductor device according to claim 21, wherein the second semiconductor film is an amorphous semiconductor film or a microcrystalline semiconductor film.

29. The semiconductor device according to claim 21, wherein the gate wiring contains a metal material selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, neodymium, aluminum, copper, silver, gold, and platinum.

30. The semiconductor device according to claim 21, wherein the source wiring and the electrode contains a metal material selected from the group consisting of aluminum, titanium, molybdenum, copper, tantalum, chromium, and nickel.