Method of programming nonvolatile memory device

• US 8,059,460 B2
• Filed: 12/31/2009
• Issued: 11/15/2011
• Est. Priority Date: 02/02/2009
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Yang, Chul Woo, Jeong, Byoung Kwan, Yoon, Mi Sun
• Primary Examiner(s): LE, THONG QUOC
• Application Number:
  US12/650,608
• Publication Number:
  US 20100195401A1
• Time in Patent Office: 684 Days
• Field of Search: 365/185.09, 365/185.22, 365/185.12, 365/185.19
• US Class Current: 365/185.09
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/3454 Arrangements for verifying correct programming or for detecting overprogrammed cells

Abstract

A method of programming a nonvolatile memory device includes an inputting step for inputting program data to a first latch of each of page buffers, and inputting redundancy data to a second latch of each of the page buffers, a verification result storage step for performing a program operation on selected memory cells using the program data stored in the first latch, performing a verification operation for the program operation, and storing a result of the verification operation in the first latch of each of the page buffers coupled with the selected memory cells, a verification result change step for changing the result stored in the first latch using the redundancy data stored in the second latch, and a verification check step for determining whether all data stored in the second latches, after the verification result change step, are program pass data.

Claims

1. A method of programming a nonvolatile memory device, comprising:

an inputting step of inputting program data to a first latch of each of page buffers, and inputting redundancy data to a second latch of each of the page buffers;

a verification result storage step of performing a program operation on selected memory cells using the program data stored in the first latch, performing a verification operation for the program operation, and storing a result of the verification operation in the first latch of each of the page buffers coupled with the selected memory cells;

a verification result change step of changing the result stored in the first latch using the redundancy data stored in the second latch; and

a verification check step of determining whether all data stored in the first latches, after the verification result change step, are program pass data.

2. The method of claim 1, further comprising:

a program frequency check step of counting a number of times that the program operation has been performed, if not all data stored in the second latches after the verification result change step are determined to be program pass data; and

a set fail step of setting state data to ‘

fail’ and

finishing the program operation, when the number of times that the program operation has been performed is a set value or more.

3. The method of claim 2, further comprising:

a repeating step of repeating the verification result storage step, the program frequency check step, the verification result change step, and the verification check step when the number of times that the program operation has been performed is not the set value or more, wherein each time the program operation is performed the program operation uses a program voltage that is changed according to an increment step pulse program (ISPP) method.

4. The method of claim 1, further comprising:

a set pass step of setting a state data to ‘

pass’ and

finishing the program operation, if all the data stored in all the page buffers, after the verification result change step, are determined to be program pass data.

5. A method of programming a nonvolatile memory device, comprising:

performing a program operation and a verification operation for the program operation;

loading redundancy data, if a program pass is not obtained as a result of performing a predetermined number of the program and verification operations;

setting first data to page buffers coupled with a fail bit line using the redundancy data;

determining whether all the program operations are a pass by checking whether all data stored in the page buffers are the first data; and

setting a state data to ‘

fail’ and

finishing the program operation, if one of the program operations is determined not to be a pass.

6. The method of claim 5, wherein the loading of the redundancy data comprises:

resetting an additional latch other than latches for storing program data, from among the page buffers; and

inputting the first data to the additional latch.

7. The method of claim 6, wherein the inputting of the first data to the additional latch comprises, inputting the first data to a page buffer coupled with a redundant memory cell, when a repair control signal is received.

8. The method of claim 7, further comprising, setting the state data to ‘

pass’ and

finishing the program operations, if all the program operations are determined to be a pass.

9. The method of claim 5, further comprising, providing a program voltage that is raised by a step voltage, before performing the program operation additional times.