Semiconductor device and method for manufacturing the same
First Claim
1. A method for manufacturing a semiconductor device comprising:
- forming a semiconductor film over a substrate;
providing the semiconductor film with a metal element;
crystallizing the semiconductor film provided with the metal element;
forming a gate insulating film over the semiconductor film;
forming a first gate electrode and a second gate electrode over the gate insulating film;
forming a pair of first impurity regions and a pair of second impurity regions in the semiconductor film; and
forming a wiring electrically connected to one of the pair of first impurity regions and one of the pair of second impurity regions,wherein the one of the pair of first impurity regions is in direct physical contact with the one of the pair of second impurity regions.
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Abstract
A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film an a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
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Citations
19 Claims
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1. A method for manufacturing a semiconductor device comprising:
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forming a semiconductor film over a substrate; providing the semiconductor film with a metal element; crystallizing the semiconductor film provided with the metal element; forming a gate insulating film over the semiconductor film; forming a first gate electrode and a second gate electrode over the gate insulating film; forming a pair of first impurity regions and a pair of second impurity regions in the semiconductor film; and forming a wiring electrically connected to one of the pair of first impurity regions and one of the pair of second impurity regions, wherein the one of the pair of first impurity regions is in direct physical contact with the one of the pair of second impurity regions. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for manufacturing a semiconductor device comprising:
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forming a semiconductor film over a substrate; providing the semiconductor film with a metal element; crystallizing the semiconductor film provided with the metal element; forming a gate insulating film over the semiconductor film; forming a first gate electrode and a second gate electrode over the gate insulating film; forming a pair of first impurity regions and a pair of second impurity regions in the semiconductor film; and forming a wiring electrically connected to one of the pair of first impurity regions and one of the pair of second impurity regions, wherein the one of the pair of first impurity regions is in direct physical contact with the one of the pair of second impurity regions, and wherein the metal element is highly concentrated in the other one end of the pair of first impurity regions and in the other one end of the pair of second impurity regions. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for manufacturing a semiconductor device comprising:
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forming a semiconductor film over a substrate; crystallizing the semiconductor film; forming a gate insulating film over the semiconductor film; forming a first gate electrode and a second gate electrode over the gate insulating film; forming a pair of first impurity regions and a pair of second impurity regions in the semiconductor film; and forming a wiring electrically connected to one of the pair of first impurity regions and one of the pair of second impurity regions, wherein the one of the pair of first impurity regions is in direct physical contact with the one of the pair of second impurity regions. - View Dependent Claims (16, 17, 18, 19)
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Specification
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- Resources
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsFukunaga, Takeshi, Takayama, Toru, Takemura, Yasuhiko, Uochi, Hideki, Zhang, Hongyong
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Primary Examiner(s)Kebede; Brook
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Application NumberUS12/579,642Publication NumberTime in Patent Office768 DaysField of Search438149-167, 257/E29.151US Class Current438/149CPC Class CodesG09G 2300/0408 Integration of the drivers ...H01L 21/02532 Silicon, silicon germanium,...H01L 21/02672 using crystallisation enhan...H01L 27/1251 comprising TFTs having a di...H01L 27/1277 using a crystallisation pro...H01L 27/1281 by using structural feature...H01L 29/66757 Lateral single gate single ...
