System and method for powering an information handling system in multiple power states

• US 8,063,619 B2
• Filed: 10/20/2008
• Issued: 11/22/2011
• Est. Priority Date: 10/20/2008
• Status: Active Grant

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Clegg, Joseph A., Zhu, Guangyong, Wood, Merle J.
• Primary Examiner(s): Berhane; Adolf
• Assistant Examiner(s): PHAM, EMILY P
• Application Number:
  US12/254,489
• Publication Number:
  US 20100096924A1
• Time in Patent Office: 1,128 Days
• Field of Search: 323/282, 323/284, 323/285, 323/349, 323/351, 323265-267
• US Class Current: 323/282
• CPC Class Codes: H02J 7/32 for charging batteries from a charging set comprising a non-electric prime mover rotating at constant speed
• CPC Class Codes: H02J 9/061 for DC powered loads
• CPC Class Codes: Y02B 70/30 Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
• CPC Class Codes: Y04S 20/20 End-user application control systems

Abstract

Power is supplied to an information handling system chipset with a single voltage regulator having dual phases. A first phase of the voltage regulator provides power to a low power state power rail in an independent mode to support a low power state, such as a suspend or hibernate state. A second phase of the voltage regulator provides power to a run power state power rail in combination with the first phase by activation of a switch, such as a MOSFET load switch, that connects the low power state power rail and the run power state power rail. Voltage sensed from both power rails is applied to control voltage output so that the run power state power rail is maintained within more precise constraints than the low power state power rail.

Claims

1. An information handling system comprising:

plural components operable to process information;

a chipset interfaced with the plural components and operable to coordinate interactions of the plural components;

a power supply operable to provide power to the plural components and the chipset; and

a voltage regulator controller interfaced with the power supply and operable to supply power to the chipset, the voltage regulator controller having first and second phases, the first phase interfaced with a first power rail to provide power to the chipset in a first power state, the second phase interfaced with a second power rail to provide power to the chipset in a second power state;

a switch disposed between the first and second power rails, the switch operable to interface the first and second power rails in the second power state and disconnect the first and second power rails in the first power state;

a first voltage sense associated with the first power rail and interfaced with the voltage regulator controller; and

a second voltage sense associate with the second power rail and interfaced with the voltage regulator controller;

wherein the voltage regulator controller uses the first voltage sense to control output of the first phase in the first power state and combines the first and second voltage senses to control output of the first and second phases in the second power state.

2. The information handling system of claim 1 wherein the voltage regulator controller maintains the first voltage sense within a first constraint and the second voltage sense within a second constraint during the second power state.

3. The information handling system of claim 2 wherein the second constraint is more precise than the first constraint.

4. A method for providing power to electronic components that operate in at least first and second power states, the method comprising:

powering a first power rail in the first power state with a first phase of a two phase voltage regulator controller;

powering the first power rail and a second power rail in a second power state, the second power rail powered with a second phase of the two phase voltage regulator controller;

selectively connecting the first and second power rails when in the second power state;

feeding back a voltage from the first power rail and the second power rail to the voltage regulator controller during the second power state; and

controlling the voltage of the first power rail within a first constraint and the voltage of the second power rail with a second constraint.

5. The method of claim 4 wherein the second constraint is more precise than the first constraint.

6. A system for powering electronic components, the system comprising:

a two phase voltage regulator having a first phase output and a second phase output;

a MOSFET switch operable to connect the first phase output with the second phase output when both phases are active and to disconnect the first phase output from the second phase output when only the first phase output is active;

a reduced power state power rail interfaced with the first phase and a run power state power rail interfaced with the second phase; and

a first voltage sense associated with the reduced power state power rail and a second voltage sense associated with the run power state power rail, the voltage regulator applying both the first and second voltage senses to control both the first and second phases.