Anti-pop circuit

• US 8,063,699 B2
• Filed: 06/19/2009
• Issued: 11/22/2011
• Est. Priority Date: 06/19/2009
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Conexant Systems Incorporated (Synaptics Incorporated)
• Inventors: Fan, Xin, Crespi, Lorenzo, Larsen, Christian
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): NGUYEN, KHIEM D
• Application Number:
  US12/488,438
• Publication Number:
  US 20100321112A1
• Time in Patent Office: 886 Days
• Field of Search: 330/51, 330/251, 330/253, 330/255, 330/294, 381/94.5
• US Class Current: 330/51
• CPC Class Codes: H03F 1/305 in case of switching on or off of a power supply
• CPC Class Codes: H03F 2200/144 the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45534 the FBC comprising multiple switches and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45674 the LC comprising one current mirror
• CPC Class Codes: H03F 3/3022 CMOS common source output SEPP amplifiers H03F3/3008 takes precedence
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence

Abstract

Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an amplifier.

Claims

1. A reduced pop amplifier comprising:

an amplifier stage;

an output stage comprising;

a core output stage;

an input to the core output stage coupled to the amplifier stage;

an output of the core output stage and;

a compensation network coupled between the output and the input;

said compensation network comprising a capacitor, a first switch and a second switch;

wherein the first switch breaks the connectivity between the output and the input when a control signal is low but maintains the connectivity between the input and the output when the control signal is high and the second switch shunts the capacitor to a low power voltage when the control signal is low, and wherein the control signal is low when the amplifier stage is powered down and remains low until after the amplifier stage is powered up and remains high until before the amplifier stage is powered down.

2. The reduced pop amplifier of claim 1, wherein the low power voltage is ground.

3. The reduced pop amplifier of claim 1, wherein the compensation network further comprises a resistor.

4. The reduced pop amplifier of claim 1, further comprising a third switch, wherein the third switch pulls the output to the low power voltage when the control signal is low.

5. The reduced pop amplifier of claim 1, wherein the core output stage is a differential output stage having a second input and a second output, and wherein the output stage further comprises a second compensation network coupled between the second output and the second input;

said second compensation network having a second capacitor, a third switch and a fourth switch, wherein the third switch breaks the connectivity between the second output and the second input when a control signal is low but maintains the connectivity between the second input and the second output when the control signal is high and the fourth switch shunts the second capacitor to a low power voltage when the control signal is low.

6. The reduced pop amplifier of claim 1 further comprising:

a bias circuit between the amplifier stage and the output stage;

wherein the core output stage is a push-pull output stage having a second input and wherein the output stage further comprises a second compensation network coupled between the output and the second input;

said second compensation network having a second capacitor, a third switch and a fourth switch, wherein the third switch breaks the connectivity between the output and the second input when a control signal is low but maintains the connectivity between the second input and the output when the control signal is high and the fourth switch shunts the second capacitor to a low power voltage when the control signal is low.

7. The reduced pop amplifier of claim 6 further comprising a fifth switch, wherein the fifth switch pulls the output to the low power voltage when the control signal is low.

8. The reduced pop amplifier of claim 6, further comprising a fifth switch, wherein the fifth switch pulls the input to the high power voltage when the control signal is low.

9. The reduced pop amplifier of claim 6, wherein the core output stage further comprises a p-type field effect transistor (FET) and an n-type FET.

10. A method for reducing pop in an amplifier comprising:

breaking a connection in a compensation network coupled to an input and an output of an output stage in an amplifier circuit to prevent current from flowing between the output and the input;

shunting a capacitor in the compensation network to a low power voltage; and

pulling the output to the low power voltage.

11. A method for reducing pop in an amplifier circuit comprising:

receiving a control signal; and

performing the method of claim 10, whenever the control signal is low.

12. The method of claim 10 wherein the output stage further comprises:

a second compensation network coupled to a second input and a second output and said method further comprising;

breaking a connection in the second compensation network to prevent current from flowing between the second output and the second input; and

shunting a second capacitor in the second compensation network to a low power voltage.

13. The method of claim 12 further comprising pulling the second input to the high power voltage.

14. The method of claim 12 wherein the output and the second output are combined.

15. The method of claim 10 wherein the control signal is low when the amplifier circuit is powered down and remains low until after the amplifier circuit is powered up and remains high until before the amplifier circuit is powered down.

16. A reduced pop amplifier comprising:

an amplifier stage;

an output stage comprising;

a core output stage;

an input to the core output stage coupled to the amplifier stage;

an output of the core output stage;

a compensation network comprising a capacitor coupled to the input and the output;

means for breaking a connection in the compensation network to prevent current from flowing between the output and the input;

means for shunting a capacitor in the compensation network to a low power voltage; and

means for pulling the output to the low power voltage.

17. The reduced pop amplifier of claim 16 wherein the means for breaking is a first switch controlled by a control signal and the means for shunting is a second switch controlled by the control signal.

18. The reduced pop amplifier of claim 16 further wherein the output stage further comprises:

a second input to the core output stage and a second output to the core output stage;

a second compensation network having a capacitor coupled to the second input and the second output;

means for breaking a connection in the second compensation network to prevent current from flowing between the second output and the second input; and

mean for shunting the second capacitor in the second compensation network to a low power voltage.

19. The reduced pop amplifier of claim 18 wherein the output and the second output are combined.

20. A system for reducing pop in an amplifier comprising:

a compensation network coupled to an input and an output of an output stage in an amplifier circuit, wherein the compensation network is configured to prevent current from flowing between the output and the input;

a capacitor in the compensation network configured to be shunted to a low power voltage; and

a switch configured to pull the output to the low power voltage when the amplifier circuit is powered down.

21. The system of claim 20 further comprising a controller for generating a control signal to control the switch.

22. The system of claim 20 wherein the switch is configured to pull the output to the low power voltage when the capacitor in the compensation network is shunted to the low power voltage.