Three-dimensional die stacks with inter-device and intra-device optical interconnect

• US 8,064,739 B2
• Filed: 10/23/2007
• Issued: 11/22/2011
• Est. Priority Date: 10/23/2007
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Binkert, Nathan, Davis, Al, Jouppi, Norm, Beausoleil, Raymond
• Primary Examiner(s): Le; Uyen Chau N
• Assistant Examiner(s): Prince; Kajli
• Application Number:
  US11/977,350
• Publication Number:
  US 20090103855A1
• Time in Patent Office: 1,491 Days
• Field of Search: 385/14
• US Class Current: 385/14
• CPC Class Codes: G02B 6/43 Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

Examples of a computer system packaged in a three-dimensional stack of dies are described. The package includes an electrical die and an optical die coupled to and stacked with the electrical die. The electrical die includes circuitry to process and communicate electrical signals, and the optical die includes structures to transport optical signals. The electrical die has a smaller area than the optical die so that the optical die includes an exposed mezzanine which is configured with optical input/output ports. Additionally, the packaging can be configured to provide structural support against insertion forces for external optical connections.

Claims

1. An apparatus comprising a three-dimensional stack of dies, the apparatus comprising:

a processor die having a plurality of processor cores;

an electrical die comprising a cache memory and a memory controller;

an optical die coupled to the electrical die, said optical die comprising structures to transport and modulate optical signals, wherein the processor die, electrical die, and optical die are stacked one over another to form the three-dimensional stack; and

an exposed optical mezzanine of the optical die which is configured with optical input/output ports.

2. The apparatus of claim 1, further comprising:

a cooling device attached to said processor die; and

packaging configured to provide structural support against insertion forces when optical fibers are interconnected to the optical input/output ports on the optical die.

3. The apparatus of claim 1, wherein the electrical die has a smaller area than the optical die, and wherein the optical input/output ports of the exposed optical mezzanine are externally accessible when the processor die, electrical die, and optical die are stacked together.

4. The apparatus of claim 1, further comprising:

one or more base dies coupled to and stacked with the optical die on a first side of the optical die opposite of a second side of the optical die that faces said electrical die, wherein said base die(s) comprise electrical and/or optical dies.

5. The apparatus of claim 4, wherein the one or more base dies include at least one memory die having a memory device, wherein the memory controller is electrically connected to the memory device through electrical vias that pass through the optical die.

6. The apparatus of claim 4, wherein the one or more base dies each has a smaller area than the optical die such that the exposed optical mezzanine is on a side of the optical die facing the one or more base dies.

7. The apparatus of claim 1, further comprising:

a sidewall structure to form a cavity into which said processor die, electrical die, and optical die are positioned.

8. The apparatus of claim 1, further comprising electrical vias configured to go through at least the optical die.

9. The apparatus of claim 1, wherein the exposed optical mezzanine further includes at least one input for receiving laser input from an external laser.

10. The apparatus of claim 9, wherein the external laser is attached to the exposed optical mezzanine.

11. The apparatus of claim 9, wherein the external laser is coupled to the exposed optical mezzanine by way of an optical fiber.

12. The apparatus of claim 1, further comprising:

a diamond layer for heat dissipation provided between the optical die and the electrical die.

13. The apparatus of claim 1, wherein the optical die has at least one optoelectronic converter to receive an electrical signal from the electrical die and to convert the electrical signal to an optical signal,

wherein the optoelectronic converter is configured to route the optical signal to a first waveguide if the optical signal is destined to one of the processor cores on the processor die, and

wherein the optoelectronic converter is configured to route the optical signal to a second waveguide to pass the optical signal to one of the optical input/output ports on the exposed optical mezzanine to direct the optical signal to an external device outside the three-dimensional stack of dies, if the optical signal is destined to the external device.

14. A method for forming a three-dimensional stack of dies, the method comprising:

arranging a processor die with an electrical die in the stack, wherein the processor die has a plurality of processor cores;

bonding the electrical die comprising a cache memory and memory controller to an optical die in the stack, wherein the optical die comprises structures to transport and modulate optical signals; and

exposing a mezzanine area on the optical die having optical input/output ports when the processor die, electrical die, and optical die are stacked together in the stack.

15. The method of claim 14, wherein the optical die has at least optoelectronic converter to receive an electrical signal from the electrical die and to convert the electrical signal to an optical signal, the method further comprising:

arranging the optoelectronic converter to;

route the optical signal to a first waveguide if the optical signal is destined to one of the processor cores on the processor die, and

route the optical signal to a second waveguide to pass the optical signal to one of the optical input/output ports on the exposed mezzanine area to direct the optical signal to an external device outside the three-dimensional stack of dies, if the optical signal is destined to the external device.

16. An apparatus having a three-dimensional stack of semiconductor dies comprising:

a processor die having a plurality of processor cores;

a memory controller die having a memory controller, a cache memory, and a network interface;

an electrical die comprising at least analog electronics circuitry; and

an optical die comprising structures to transport and modulate optical signals and coupled to the electrical die by way of a face-to-face bond, wherein the memory controller die is to communicate with the optical die through the electrical die; and

a mezzanine area on the optical die which is exposed with input/output ports for receiving and sending the optical signals.

17. The apparatus of claim 16, further comprising:

a cooling device attached to the processor die.

18. The apparatus of claim 16, further comprising at least one memory die in the stack and electrical through-vias interconnecting the at least one memory die to said memory controller, wherein the at least one memory die has a memory device.

19. The apparatus of claim 16, further comprising:

at least one additional optical die in the stack.

20. The apparatus of claim 16, further comprising:

a diamond layer for heat dissipation provided between the optical die and the electrical die.

21. An apparatus comprising a three-dimensional stack of dies, the apparatus comprising:

a processor die having a plurality of processor cores;

an electrical die comprising a cache memory and a memory controller;

an optical die coupled to the electrical die, said optical die comprising structures to transport and modulate optical signals, wherein the processor die, electrical die, and optical die are stacked one over another to form the three-dimensional stack; and

an exposed optical mezzanine of the optical die which is configured with optical input/output ports,

wherein the optical die has at least one optoelectronic converter to receive an electrical signal from the electrical die and to convert the electrical signal to an optical signal,

wherein the optoelectronic converter is configured to route the optical signal to a first waveguide if the optical signal is destined to one of the processor cores on the processor die,

wherein the optoelectronic converter is configured to route the optical signal to a second waveguide to pass the optical signal to one of the optical input/output ports on the exposed optical mezzanine to direct the optical signal to an external device outside the three-dimensional stack of dies, if the optical signal is destined to the external device, and

wherein the processor cores are divided into plural clusters, wherein the electrical die has plural tiles, each tile having a respective memory controller and cache memory for a respective one of the plural clusters of processor cores, and wherein the optical die has plural optoelectronic converters corresponding to the plural tiles.

22. A method for forming a three-dimensional stack of dies, the method comprising:

arranging a processor die with an electrical die in the stack, wherein the processor die has a plurality of processor cores;

bonding the electrical die comprising a cache memory and memory controller to an optical die in the stack, wherein the optical die comprises structures to transport and modulate optical signals; and

exposing a mezzanine area on the optical die having optical input/output ports when the processor die, electrical die, and optical die are stacked together in the stack, wherein the optical die has at least optoelectronic converter to receive an electrical signal from the electrical die and to convert the electrical signal to an optical signal;

arranging the optoelectronic converter to;

route the optical signal to a first waveguide if the optical signal is destined to one of the processor cores on the processor die, and

route the optical signal to a second waveguide to pass the optical signal to one of the optical input/output ports on the exposed mezzanine area to direct the optical signal to an external device outside the three-dimensional stack of dies, if the optical signal is destined to the external device;

dividing the processor cores on the processor die into plural clusters;

providing plural tiles on the electrical die, wherein each tile has a respective memory controller and cache memory for a respective one of the plural clusters of processor cores; and

providing, on the optical die, plural optoelectronic converters corresponding to the plural tiles.