Systems and methods for reducing power robbing impact of interference to a satellite
First Claim
1. A method of processing return feeder link signals at a satellite gateway including a plurality of spatially diverse receive antennas, the method comprising:
- receiving respective return feeder link signals at each of the plurality of receive antennas;
selectively adjusting amplitudes and/or phases of a plurality of the return feeder link signals received at the plurality of receive antennas in response to amplitude/phase adjustment settings to provide a plurality of adjusted return feeder link signals;
combining the plurality of adjusted feeder link signals to generate a combined return feeder link signal;
detecting periodic amplitude variation in the combined return feeder link signal; and
configuring the amplitude/phase adjustment settings in response to the combined return feeder link signal to reduce the periodic amplitude variation in the combined return feeder link signal.
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Accused Products
Abstract
Processing return feeder link signals at a satellite gateway including a first and second receive antennas includes receiving first and second return feeder link signals at the first and second receive antennas, respectively, modulating a phase of the first return feeder link signal to form an adjusted first feeder link signal, combining the adjusted first feeder link signal with the second return feeder link signal to form a combined feeder link signal, detecting periodic amplitude variation in the combined feeder link signal, and shifting a phase of the first return feeder link signal to reduce periodic amplitude variation in the combined feeder link signal.
185 Citations
27 Claims
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1. A method of processing return feeder link signals at a satellite gateway including a plurality of spatially diverse receive antennas, the method comprising:
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receiving respective return feeder link signals at each of the plurality of receive antennas; selectively adjusting amplitudes and/or phases of a plurality of the return feeder link signals received at the plurality of receive antennas in response to amplitude/phase adjustment settings to provide a plurality of adjusted return feeder link signals; combining the plurality of adjusted feeder link signals to generate a combined return feeder link signal; detecting periodic amplitude variation in the combined return feeder link signal; and configuring the amplitude/phase adjustment settings in response to the combined return feeder link signal to reduce the periodic amplitude variation in the combined return feeder link signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A satellite gateway comprising:
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a plurality of receive antennas; and a processor coupled to the plurality of receive antennas and configured to receive respective return feeder link signals from each of the plurality of receive antennas, configured to selectively adjust amplitudes and/or phases of a plurality of the return feeder link signals received at the plurality of receive antennas in response to amplitude/phase adjustment settings to provide a plurality of adjusted return feeder link signals, and configured to combine the plurality of adjusted feeder link signals to generate a combined return feeder link signal; wherein the processor comprises a control circuit configured to detect periodic amplitude variation in the combined return feeder link signal, and to configure the amplitude/phase adjustment settings in response to periodic amplitude variation in the combined return feeder link signal to reduce periodic amplitude variation in the combined return feeder link signal. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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22. A method of processing return feeder link signals at a satellite gateway including a first and second receive antennas, the method comprising:
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receiving first and second return feeder link signals at the first and second receive antennas, respectively; modulating a phase of the first return feeder link signal to form an adjusted first feeder link signal; combining the adjusted first feeder link signal with the second return feeder link signal to form a combined feeder link signal; detecting periodic amplitude variation in the combined feeder link signal; shifting a phase of the first return feeder link signal to reduce the periodic amplitude variation in the combined feeder link signal; receiving third and fourth return feeder link signals at respective third and fourth receive antennas; modulating a phase of the third return feeder link signal to form an adjusted third feeder link signal; combining the adjusted third feeder link signal with the fourth return feeder link signal to form a second combined feeder link signal; detecting periodic amplitude variation in the second combined feeder link signal; and shifting a phase of the third return feeder link signal to reduce periodic amplitude variation in the second combined feeder link signal. - View Dependent Claims (23, 24)
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25. A satellite gateway, comprising:
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a processor configured to receive first and second return feeder link signals from first and second receive antennas, respectively; a phase modulator configured to modulate a phase of the first return feeder link signal; a phase shifter configured to shift a phase of the first return feeder link signal by a phase delay; a combiner configured to combine the first return feeder link signal with the second return feeder link signal to form a combined feeder link signal; a power detector configured to detect periodic amplitude variation in the combined feeder link signal; and a feedback loop from the power detector to the phase shifter configured to adjust the phase delay to reduce periodic amplitude variation in the combined feeder link signal; wherein the processor is further configured to receive third and fourth return feeder link signals from respective third and fourth receive antennas, and wherein the processor further comprises; a second phase modulator configured to modulate a phase of the third return feeder link signal; a second phase shifter configured to shift a phase of the third return feeder link signal by a second phase delay; a second combiner configured to combine the third return feeder link signal with the fourth return feeder link signal to form a second combined feeder link signal; a second power detector configured to detect periodic amplitude variation in the second combined feeder link signal; and a second feedback loop from the second power detector to the second phase shifter configured to adjust the second phase delay to reduce periodic amplitude variation in the second combined feeder link signal. - View Dependent Claims (26)
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27. A satellite gateway, comprising:
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a processor configured to receive first and second return feeder link signals from first and second receive antennas, respectively; a phase modulator configured to modulate a phase of the first return feeder link signal; a phase shifter configured to shift a phase of the first return feeder link signal by a phase delay; a combiner configured to combine the first return feeder link signal with the second return feeder link signal to form a combined feeder link signal; a power detector configured to detect periodic amplitude variation in the combined feeder link signal; and a feedback loop from the power detector to the phase shifter configured to adjust the phase delay to reduce periodic amplitude variation in the combined feeder link signal; wherein the processor is further configured to receive third and fourth return feeder link signals from respective third and fourth receive antennas, and wherein the processor further comprises; a second phase modulator configured to modulate a phase of the third return feeder link signal; a second phase shifter configured to shift a phase of the third return feeder link signal by a second phase delay; a third phase modulator configured to modulate a phase of the fourth return feeder link signal; and a third phase shifter configured to shift a phase of the fourth return feeder link signal by a third phase delay; wherein the combiner is configured to combine the first, second, third and fourth return feeder link signals to form the combined feeder link signal.
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Specification