Method for forming a patterned thick metallization atop a power semiconductor chip
DCFirst Claim
1. A power semiconductor device comprising:
- a power semiconductor chip with a plurality of contact zones;
a dielectric layer overlaying the semiconductor surface extending over said plurality of contact zones and having a plurality of contact openings thereon;
a first metal layer having a thickness larger than 4 micron overlaying the dielectric layer contacting a plurality of source and body regions underlying the dielectric layer through the plurality of contact openings; and
Cu bond wires connecting the metal layer to a plurality of source leads on a lead frame.
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Abstract
A method is disclosed for forming a patterned thick metallization atop a semiconductor chip wafer. The method includes fabricating a nearly complete semiconductor chip wafer ready for metallization; depositing a bottom metal layer of sub-thickness TK1 together with its built-in alignment mark using a hot metal process; depositing a top metal layer of sub-thickness TK2 using a cold metal process thus forming a stacked thick metallization of total thickness TK=TK1+TK2; then, use the built-in alignment mark as reference, patterning the stacked thick metallization. A patterned thick metallization is thus formed with the advantages of better metal step coverage owing to the superior step coverage nature of the hot metal process as compared to the cold metal process; and lower alignment error rate owing to the lower alignment signal noise nature of the cold metal process as compared to the hot metal process.
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Citations
14 Claims
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1. A power semiconductor device comprising:
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a power semiconductor chip with a plurality of contact zones; a dielectric layer overlaying the semiconductor surface extending over said plurality of contact zones and having a plurality of contact openings thereon; a first metal layer having a thickness larger than 4 micron overlaying the dielectric layer contacting a plurality of source and body regions underlying the dielectric layer through the plurality of contact openings; and Cu bond wires connecting the metal layer to a plurality of source leads on a lead frame. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification