Wafer level package structure, and sensor device obtained from the same package structure

• US 8,067,769 B2
• Filed: 11/24/2006
• Issued: 11/29/2011
• Est. Priority Date: 11/25/2005
• Status: Expired due to Fees

• Current Assignee: Panasonic Electric Works Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Electric Works Company Limited (Panasonic Holdings Corporation)
• Inventors: Suzuki, Yuji, Baba, Toru, Saijo, Takashi, Takegawa, Yoshiyuki, Gotou, Kouji, Kataoka, Kazushi, Okudo, Takafumi, Miyajima, Hisakazu
• Primary Examiner(s): Smith; Zandra
• Assistant Examiner(s): CHIU, TSZ K
• Application Number:
  US12/094,674
• Publication Number:
  US 20090267165A1
• Time in Patent Office: 1,831 Days
• Field of Search: 734/93, 735/143.3, 310/328
• US Class Current: 257/48
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2201/0242 Gyroscopes
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: B81C 2203/038 Bonding techniques not provided for in B81C2203/031 - B81C2203/037
• CPC Class Codes: G01C 19/56 Turn-sensitive devices using vibrating masses, e.g. vibratory angular rate sensors based on Coriolis forces
• CPC Class Codes: G01P 1/023 for acceleration measuring devices
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/123 by piezo-resistive elements, e.g. semiconductor strain gauges
• CPC Class Codes: G01P 15/18 in two or more dimensions
• CPC Class Codes: G01P 2015/0842 the mass being of clover leaf shape

Abstract

A wafer level package structure with a plurality of compact sensors such as acceleration sensors and gyro sensors is provided. This package structure is composed of a semiconductor wafer with plural sensor units, and a pair of package wafers bonded to both surfaces of the semiconductor wafer. Each of the sensor units has a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion. Since the semiconductor wafer is bonded to each of the package wafers by a solid-phase direct bonding without diffusion between a surface-activated region formed on the frame and a surface-activated region formed on the package wafer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding interface.

Claims

1. A wafer level package structure comprising:

a semiconductor wafer having a plurality of sensor units, each of which comprises a frame having an opening, a movable portion held in said opening to be movable relative to said frame, and a detecting portion configured to output an electric signal according to a positional displacement of said movable portion;

a first package wafer bonded to one of opposite surfaces of said semiconductor wafer; and

a second package wafer bonded to the other surface of said semiconductor wafer;

wherein said frame of each of said sensor units has a first surface-activated region formed on a surface facing the first package wafer over an entire circumference thereof so as to surround said movable portion, and a second surface-activated region formed on a surface facing the second package wafer over an entire circumference thereof so as to surround said movable portion,

the bonding between said semiconductor wafer and the first package wafer is a solid-phase direct bonding without diffusion between said first surface-activated region and a surface-activated region formed on the first package wafer, and

the bonding between said semiconductor wafer and the second package wafer is a solid-phase direct bonding without diffusion between said second surface-activated region and a surface-activated region formed on the second package wafer,

wherein at least one of said first surface-activated region and said second surface-activated region comprises a ring-like outer surface-activated region formed over the entire circumference of said frame so as to surround said movable portion, and a ring-like inner surface-activated region formed at an inner side of said outer surface-activated region over the entire circumference of said frame so as to surround said movable portion, and

wherein said wafer level package structure further comprises an auxiliary sealing portion for connecting between said outer surface-activated region and said inner surface-activated region, and wherein said auxiliary sealing portion is formed at plural locations spaced from each other by a predetermined distance in the circumferential direction of said frame.

2. The wafer level package structure as set forth in claim 1, wherein said first surface-activated region, said second surface-activated region, the surface-activated region of the first package wafer, and the surface-activated region of the second package wafer are any one of a plasma-treated surface, an ion-beam irradiated surface, and an atomic-beam irradiated surface.

3. The wafer level package structure as set forth in claim 1, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Si and Si, the solid-phase direct bonding between Si and SiO₂, and the solid-phase direct bonding between SiO₂ and SiO₂.

4. The wafer level package structure as set forth in claim 1, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Au and Au, the solid-phase direct bonding between Cu and Cu, and the solid-phase direct bonding between Al and Al.

5. The wafer level package structure as set forth in claim 1, wherein each of said sensor units has an integrated circuit operable in collaboration with said detecting portion, and said integrated circuit is disposed adjacent to said opening of said frame, and electrically connected to a through-hole wiring formed in the first package wafer.

6. The wafer level package structure as set forth in claim 5, wherein said integrated circuit is disposed so as to surround said opening of said frame.

7. The wafer level package structure as set forth in claim 5, wherein said through-hole wiring is formed in a tapered shape in the first package wafer such that an end portion facing said sensor unit has a larger area than the other end portion.

8. The wafer level package structure as set forth in claim 1, wherein each of said sensor units is an acceleration sensor unit,

said movable portion comprises a weight and a beam portion extending between said frame and said weight, and

said detecting portion comprises at least one piezoresistive element provided on said beam portion.

9. The wafer level package structure as set forth in claim 1, wherein each of said sensor units is a gyro sensor unit,

said movable portion comprises a first mass body vibrated by a vibrating means, and a second mass body coupled to the first mass body, and

said detecting portion is configured to convert a positional displacement of the second mass body caused when a rotational force is added during the vibration of the first mass body into an electrical signal.

10. The wafer level package structure as set forth in claim 1, wherein each of said sensor units has a conductive layer formed at a position closer to said movable portion than said first surface-activated region, and electrically connected to said detecting portion,

the first package wafer has a through-hole wiring, and a wiring layer electrically connected to said through-hole wiring with respect to each of said sensor units, and

the bonding between the first package wafer and said semiconductor wafer further comprises a solid-phase direct bonding without diffusion between an activated surface of said conductive layer and an activated surface of said wiring layer.

11. A sensor device obtained by cutting the wafer level package structure as set forth in claim 1 into a size of said sensor unit.

12. A wafer level package structure comprising:

a semiconductor wafer having a plurality of sensor units, each of which comprises a frame having an opening, a movable portion held in said opening to be movable relative to said frame, and a detecting portion configured to output an electric signal according to a positional displacement of said movable portion;

a first package wafer bonded to one of opposite surfaces of said semiconductor wafer; and

a second package wafer bonded to the other surface of said semiconductor wafer;

wherein said frame of each of said sensor units has a first surface-activated region formed on a surface facing the first package wafer over an entire circumference thereof so as to surround said movable portion, and a second surface-activated region formed on a surface facing the second package wafer over an entire circumference thereof so as to surround said movable portion,

the bonding between said semiconductor wafer and the first package wafer is a solid-phase direct bonding without diffusion between said first surface-activated region and a surface-activated region formed on the first package wafer, and

the bonding between said semiconductor wafer and the second package wafer is a solid-phase direct bonding without diffusion between said second surface-activated region and a surface-activated region formed on the second package wafer, and

wherein each of said sensor units has an integrated circuit operable in collaboration with said detecting portion, and said integrated circuit is disposed adjacent to said opening of said frame, and electrically connected to a through-hole wiring formed in the first package wafer.

13. The wafer level package structure as set forth in claim 12, wherein said first surface-activated region, said second surface-activated region, the surface-activated region of the first package wafer, and the surface-activated region of the second package wafer are any one of a plasma-treated surface, an ion-beam irradiated surface, and an atomic-beam irradiated surface.

14. The wafer level package structure as set forth in claim 12, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Si and Si, the solid-phase direct bonding between Si and SiO₂, and the solid-phase direct bonding between SiO₂ and SiO₂.

15. The wafer level package structure as set forth in claim 12, wherein at least one of the bonding between said first surface-activated region and the surface-activated region on the first package wafer and the bonding between said second surface-activated region and the surface-activated region on the second package wafer is any one of the solid-phase direct bonding between Au and Au, the solid-phase direct bonding between Cu and Cu, and the solid-phase direct bonding between Al and Al.

16. The wafer level package structure as set forth in claim 12, wherein at least one of said first surface-activated region and said second surface-activated region comprises a ring-like outer surface-activated region formed over the entire circumference of said frame so as to surround said movable portion, and a ring-like inner surface-activated region formed at an inner side of said outer surface-activated region over the entire circumference of said frame so as to surround said movable portion.

17. The wafer level package structure as set forth in claim 12, wherein said integrated circuit is disposed so as to surround said opening of said frame.

18. The wafer level package structure as set forth in claim 12, wherein said through-hole wiring is formed in a tapered shape in the first package wafer such that an end portion facing said sensor unit has a larger area than the other end portion.

19. The wafer level package structure as set forth in claim 12, wherein each of said sensor units is an acceleration sensor unit,

said movable portion comprises a weight and a beam portion extending between said frame and said weight, and

said detecting portion comprises at least one piezoresistive element provided on said beam portion.

20. The wafer level package structure as set forth in claim 12, wherein each of said sensor units is a gyro sensor unit,

said movable portion comprises a first mass body vibrated by a vibrating means, and a second mass body coupled to the first mass body, and

said detecting portion is configured to convert a positional displacement of the second mass body caused when a rotational force is added during the vibration of the first mass body into an electrical signal.

21. The wafer level package structure as set forth in claim 12, wherein each of said sensor units has a conductive layer formed at a position closer to said movable portion than said first surface-activated region, and electrically connected to said detecting portion,

the first package wafer has a through-hole wiring, and a wiring layer electrically connected to said through-hole wiring with respect to each of said sensor units, and

the bonding between the first package wafer and said semiconductor wafer further comprises a solid-phase direct bonding without diffusion between an activated surface of said conductive layer and an activated surface of said wiring layer.

22. A sensor device obtained by cutting the wafer level package structure as set forth in claim 12 into a size of said sensor unit.