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Method for debugging reconfigurable architectures

  • US 8,069,373 B2
  • Filed: 01/15/2009
  • Issued: 11/29/2011
  • Est. Priority Date: 09/03/2001
  • Status: Active Grant
First Claim
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1. A method for debugging a program running on reconfigurable hardware, comprising:

  • writing debug information into a memory in each of a plurality of configuration cycles;

    analyzing, by a debugger, the debug information;

    loading a configuration, wherein the loading is performed during the debugging and responsive to occurrence of a debugging condition that indicates that information, regarding one of the configuration cycles, is needed; and

    using the loaded configuration, reading the debug information out of the memory.

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