Semiconductor device with increased I/O leadframe including passive device
First Claim
1. A semiconductor package comprising:
- a generally planar die pad defining multiple peripheral edge segments;
a plurality of first leads which each include first and second downsets formed therein in spaced relation to each other, the first leads being disposed in spaced relation to the die pad;
a plurality of second leads, at least some of which include a downset formed therein, the second leads being disposed in spaced relation to the die pad;
a semiconductor die attached to the die pad and electrically connected to at least one of each of the first and second leads;
at least one passive component electrically connected to and extending between adjacent portions of the leadframe; and
a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the first and second leads, the semiconductor die and the passive component such that the first and second downsets of the first leads and the downsets of the second leads are covered by the package body, at least portions of the die pad and the first leads are exposed in and substantially flush with the bottom surface of the package body, and portions of the second leads protrude from respective ones of the side surfaces of the package body.
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Accused Products
Abstract
In accordance with the present invention, there are provided multiple embodiments of a semiconductor package, each embodiment including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package. More particularly, each embodiment of the semiconductor package of the present invention includes a generally planar die pad and a plurality of leads. Some of these leads include exposed bottom surface portions or lands which are provided in at least one row or ring which at least partially circumvents the die pad, with other leads including portions which protrude from respective side surfaces of a package body of the semiconductor package. A passive device may be electrically connected to and extend between the die pad and one of the leads, and/or may be electrically connected to and extend between and adjacent pair of the leads.
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Citations
20 Claims
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1. A semiconductor package comprising:
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a generally planar die pad defining multiple peripheral edge segments; a plurality of first leads which each include first and second downsets formed therein in spaced relation to each other, the first leads being disposed in spaced relation to the die pad; a plurality of second leads, at least some of which include a downset formed therein, the second leads being disposed in spaced relation to the die pad; a semiconductor die attached to the die pad and electrically connected to at least one of each of the first and second leads; at least one passive component electrically connected to and extending between adjacent portions of the leadframe; and a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the first and second leads, the semiconductor die and the passive component such that the first and second downsets of the first leads and the downsets of the second leads are covered by the package body, at least portions of the die pad and the first leads are exposed in and substantially flush with the bottom surface of the package body, and portions of the second leads protrude from respective ones of the side surfaces of the package body. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor package comprising:
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a generally planar die pad defining multiple peripheral edge segments; a plurality of first leads disposed in spaced relation to the die pad; a plurality of second leads which each include first and second downsets formed therein in spaced relation to each other, the second leads being disposed in spaced relation to the die pad; a plurality of third leads, at least some of which include a downset formed therein, the third leads being disposed in spaced relation to the die pad; a semiconductor die attached to the die pad and electrically connected to at least one of each of the first, second and third leads; at least one passive component electrically connected to and extending between adjacent portions of the leadframe; and a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the first, second and third leads, the semiconductor die and the passive component such that the first and second downsets of the second leads and the downsets of the third leads are covered by the package body, at least portions of the die pad and the first and second leads are exposed in and substantially flush with the bottom surface of the package body, and portions of the third leads protrude from respective ones of the side surfaces of the package body. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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13. A semiconductor package comprising:
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a generally planar die pad defining multiple peripheral edge segments; a plurality of first leads which are disposed in spaced relation to the die pad; a plurality of second leads which are disposed in spaced relation to the die pad; a plurality of third leads which each include a downset formed therein, the third leads being disposed in spaced relation to the die pad; a semiconductor die attached to the die pad and electrically connected to at least one of each of the first, second, and third leads; at least one passive component electrically connected to and extending between adjacent portions of the leadframe; and a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the first, second, and third leads, the semiconductor die, and the passive component such that the downsets of the third leads are covered by the package body, at least portions of the die pad and the first and second leads are exposed in and substantially flush with the bottom surface of the package body, and portions of the third leads protrude from respective ones of the side surfaces of the package body. - View Dependent Claims (14, 15, 16)
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17. A semiconductor package comprising:
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a generally planar die pad defining multiple peripheral edge segments; a plurality of first leads which are disposed in spaced relation to the die pad; a plurality of second leads which each include first and second downsets formed therein in spaced relation to each other, the second leads being disposed in spaced relation to the die pad; a plurality of third leads which are disposed in spaced relation to the die pad; a semiconductor die attached to the die pad and electrically connected to at least one of each of the first, second, and third leads; at least one passive component electrically connected to and extending between adjacent portions of the leadframe; and a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the first, second, and third leads, the semiconductor die, and the passive component such that the downsets of the second leads are covered by the package body, at least portions of the die pad and the first and second leads are exposed in and substantially flush with the bottom surface of the package body, and portions of the third leads protrude from respective ones of the side surfaces of the package body. - View Dependent Claims (18, 19, 20)
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Specification