RFID interrogator with improved symbol decoding and systems based thereon

• US 8,072,313 B2
• Filed: 01/31/2007
• Issued: 12/06/2011
• Est. Priority Date: 02/01/2006
• Status: Expired due to Fees

• Current Assignee: Vital Wireless LLC
• Original Assignee: Vital Wireless LLC
• Inventors: Drucker, Vitaly
• Primary Examiner(s): Wu, Daniel
• Assistant Examiner(s): Mahase, Pameshanand
• Application Number:
  US11/669,521
• Publication Number:
  US 20070188305A1
• Time in Patent Office: 1,770 Days
• Field of Search: 340/10.51, 370/405
• US Class Current: 340/10.4
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10039 interrogator driven, i.e. synchronous

Abstract

An improved Interrogator for use in a radio frequency identification system wherein at least one tag modulates a radio frequency signal by modulated backscatter operations.

Claims

1. In a radio frequency identification system wherein at least one tag modulates a radio frequency signal by modulated backscatter operations, wherein the modulated radio frequency signal transmitted by the at least one tag encodes a message that is represented by a sequence of symbols each corresponding to at least one bit of the message, the sequence of symbols being transmitted at a symbol rate with a corresponding symbol period, an Interrogator comprising:

a transmitter that transmits the radio frequency signal; and

a receiver that receives, demodulates and decodes the modulated radio frequency signal in order to recover the message therein, said receiver including a symbol clock recovery circuit and a symbol decoder, said symbol clock recovery circuit deriving timing information for transitions between symbols in the sequence of symbols encoded in the message, and said symbol decoder decoding a given symbol by operating on portions of a component of the modulated radio frequency signal that are received over an extended processing window, wherein the extended processing window is greater in duration than the symbol period as dictated by the timing information derived by the symbol clock recovery circuit.

2. An Interrogator according to claim 1, wherein:

a first part of the extended processing window precedes the symbol period for given symbol, a second part of the extended processing window includes the symbol period for the given symbol, and a third part of the extended processing window follows the symbol period for the given symbol.

3. An Interrogator according to claim 1, wherein:

duration of the extended processing window is substantially two times the symbol period.

4. An Interrogator according to claim 3, wherein:

a first part of the extended processing window precedes the symbol period for given symbol, a second part of the extended processing window includes the symbol period for the given symbol, and a third part of the extended processing window follows the symbol period for the given symbol, wherein the first and third parts have respective durations that are at least one half of the symbol period.

5. An Interrogator according to claim 1, wherein:

said symbol decoder includes

reference signal generation means for generating at least one reference signal that varies over of a time duration corresponding to the extended processing window;

multiplication means for samplewise multiplication of portions of the component of the modulated radio frequency signal with portions of said at least one reference signal; and

accumulation means for accumulating results of the multiplication means over the extended processing window.

6. An Interrogator according to claim 1, wherein:

said transmitter comprises an RF signal source that generates the radio frequency signal for transmission by the transmitter, and

said receiver includes a quadrature mixer for demodulating the modulated radio frequency signal received by the receiver, said quadrature mixer operably coupled to said RF signal source for homodyne demodulation.

7. An Interrogator according to claim 6, wherein:

said receiver includes low-pass filter circuitry that filters the output of the quadrature mixer to generate in-phase and quadrature signal components that are demodulated from the modulated radio frequency signal received by the receiver.

8. An Interrogator according to claim 7, wherein:

the symbol decoder decodes a given symbol by operating on portions of both the in-phase and quadrature signal components that are received over said extended processing window.

9. An Interrogator according to claim 8, wherein:

the sequence of symbols of the message are encoded by a bi-phase signal format.

10. An Interrogator according to claim 9, wherein:

said symbol decoder includes

i) reference signal generator means for generating first and second reference signals that each vary over of respective time durations corresponding to the extended processing window, the first reference signal corresponding to a data-0 symbol type of the bi-phase signal format, and the second reference signal corresponding to a data-1 symbol type of the bi-phase signal format;

ii) first multiplication means for samplewise multiplication of portions of the in-phase component of the modulated radio frequency signal with portions of the first reference signal, first accumulation means for accumulating results of the first multiplication means over the extended processing window, and first squaring means for squaring output of the first accumulation means;

iii) second multiplication means for samplewise multiplication of portions of the quadrature component of the modulated radio frequency signal with portions of the first reference signal, second accumulation means for accumulating results of the second multiplication means over the extended processing window, and second squaring means for squaring output of the second accumulation means;

iv) third multiplication means for samplewise multiplication of portions of the in-phase component of the modulated radio frequency signal with portions of the second reference signal, third accumulation means for accumulating results of the third multiplication means over the extended processing window, and third squaring means for squaring output of the third accumulation means;

v) fourth multiplication means for samplewise multiplication of portions of the quadrature component of the modulated radio frequency signal with portions of the second reference signal, fourth accumulation means for accumulating results of the fourth multiplication means over the extended processing window, and fourth squaring means for squaring output of the fourth accumulation means;

vi) first summing means for summing contributions of the first and second squaring means;

vii) second summing means for summing contributions of the third and fourth squaring means; and

viii) comparison logic for assigning bit values to the given symbol based upon output of the first and second summing means.

11. An interrogator according to claim 10, wherein:

said symbol decoder employs multiple signal processing paths for carrying out odd symbol processing in parallel with even symbol processing, said multiple signal processing paths including the set of processing elements (ii)-(viii) of claim 10 for carrying out odd symbol processing and the set of processing elements (ii)-(viii) of claim 10 for carrying out even symbol processing.

12. An interrogator according to claim 10, wherein:

the first squaring means is substituted by first means for deriving absolute value of the accumulation results of the first accumulation means;

the second squaring means is substituted by second means for deriving absolute value of the accumulation results of the second accumulation means;

the third squaring means is substituted by third means for deriving absolute value of the accumulation results of the third accumulation means; and

the fourth squaring means is substituted by fourth means for deriving absolute value of the accumulation results of the fourth accumulation means.

13. An Interrogator according to claim 9, wherein:

said symbol decoder includes

i) reference signal generator means for generating first and second reference signals that each vary over of respective time durations corresponding to the extended processing window, the first reference signal corresponding to a data-0 symbol type of the bi-phase signal format, and the second reference signal corresponding to a data-1 symbol type of the bi-phase signal format;

ii) first multiplication means for samplewise multiplication of portions of the in-phase component of the modulated radio frequency signal with portions of the first reference signal, first accumulation means for accumulating results of the first multiplication means over a processing window of a duration corresponding to the symbol period, a first storage cell for storing the accumulation results of the first accumulation means during the current processing window and outputting the accumulation results of the first accumulation means from the previous processing window, first summing means for summing the accumulation results of the first accumulation means in the current processing window and the accumulation results from the previous processing window output from the first storage cell, and first squaring means for squaring output of the first summing means;

iii) second multiplication means for samplewise multiplication of portions of the quadrature phase component of the modulated radio frequency signal with portions of the first reference signal, second accumulation means for accumulating results of the second multiplication means over a processing window of a duration corresponding to the symbol period, a second storage cell for storing the accumulation results of the second accumulation means during the current processing window and outputting the accumulation results of the second accumulation means from the previous processing window, second summing means for summing the accumulation results of the second accumulation means in the current processing window and the accumulation results from the previous processing window output from the second storage cell, and second squaring means for squaring output of the second summing means;

iv) third multiplication means for samplewise multiplication of portions of the in-phase component of the modulated radio frequency signal with portions of the second reference signal, third accumulation means for accumulating results of the third multiplication means over a processing window of a duration corresponding to the symbol period, a third storage cell for storing the accumulation results of the third accumulation means during the current processing window and outputting the accumulation results of the third accumulation means from the previous processing window, third summing means for summing the accumulation results of the third accumulation means in the current processing window and the accumulation results from the previous processing window output from the third storage cell, and third squaring means for squaring output of the third summing means;

v) fourth multiplication means for samplewise multiplication of portions of the quadrature phase component of the modulated radio frequency signal with portions of the second reference signal, fourth accumulation means for accumulating results of the fourth multiplication means over a processing window of a duration corresponding to the symbol period, a fourth storage cell for storing the accumulation results of the fourth accumulation means during the current processing window and outputting the accumulation results of the fourth accumulation means from the previous processing window, fourth summing means for summing the accumulation results of the fourth accumulation means in the current processing window and the accumulation results from the previous processing window output from the fourth storage cell, and fourth squaring means for squaring output of the fourth summing means;

vi) fifth summing means for summing contributions of the first and second squaring means;

vii) sixth summing means for summing contributions of the third and fourth squaring means; and

viii) comparison logic for assigning bit values to a given symbol based upon output of the fifth and sixth summing means.

14. An interrogator according to claim 13, wherein:

the first squaring means is substituted by first means for deriving absolute value of the output of the first summing means;

the second squaring means is substituted by second means for deriving absolute value of the output of the second summing means;

the third squaring means is substituted by third means for deriving absolute value of the output of the third summing means; and

the fourth squaring means is substituted by fourth means for deriving absolute value of the output of the fourth summing means.

15. An interrogator according to claim 9, wherein:

the modulated radio frequency signal transmitted by the at least one tag employs one of amplitude shift keying modulation and phase shift keying modulation.

16. An Interrogator according to claim 10, wherein:

the data-0 symbol and the data-1 symbol of the bi-phase signal each have transitions that occur at the beginning and end boundaries of the respective symbol.

17. An Interrogator according to claim 9, wherein:

the symbol rate of the bi-phase signaling can vary between 40 kbps and 640 kbps as dictated by downlink communication from the Interrogator to the at least one tag.

18. An Interrogator according to claim 17, wherein:

the symbol rate of the bi-phase signaling is selected by the length of a predetermined calibration waveform communicated from the Interrogator to the at least one tag.

19. An Interrogator according to claim 10, wherein:

the first reference signal is a squarewave with a period T equal to the symbol period T; and

the second reference signal is a squarewave with a period 2T equal to two times the symbol period T.

20. An Interrogator according to claim 19, wherein:

the first reference signal is orthogonal in manner that its mean over its period T is zero; and

the second reference signal is orthogonal in a manner that its mean over its 2T period is zero.

27. An Interrogator according to claim 1, wherein:

the symbol decoder decodes a given symbol by i) multiplication of portions of a component of the modulated radio frequency signal that are received over the extended processing window with portions of at least one reference signal that varies over a time duration corresponding to the extended processing window and ii) accumulation of results of the multiplication of i) over the extended processing window.

28. An Interrogator according to claim 1, wherein:

the timing information is encoded by a symbol clock signal that is substantially synchronous with transitions between symbols in the sequence of symbols encoded in the message.

21. In a radio frequency identification system wherein at least one tag modulates a radio frequency signal by modulated backscatter operations, wherein the modulated radio frequency signal transmitted by the at least one tag encodes a message that is represented by a sequence of symbols each corresponding to at least one bit of the message, the sequence of symbols being transmitted at a symbol rate with a corresponding symbol period, a method for receiving the modulated radio frequency signal comprising:

receiving the modulated radio frequency signal at an antenna;

amplifying components of the received modulated radio frequency signal;

demodulating the amplified components of received modulated radio frequency signal;

deriving timing information for transitions between symbols in the sequence of symbols encoded in the message; and

decoding a given symbol by operating on portions of the resultant signals produced by the demodulation over an extended processing window, wherein the extended processing window is greater in duration than the symbol period as dictated by the timing information derived by the symbol clock recovery circuit.

22. A method according to claim 21, wherein:

a first part of the extended processing window precedes the symbol period for given symbol, a second part of the extended processing window includes the symbol period for the given symbol, and a third part of the extended processing window follows the symbol period for the given symbol.

23. A method according to claim 22, wherein:

the extended processing window has a time duration that is substantially two times the symbol period.

24. A method according to claim 21, wherein:

the decoding includes

generating at least one reference signal that varies over of a time duration corresponding to the extended processing window;

samplewise multiplying portions of the resultant signals of the demodulation with portions of the at least one reference signal; and

accumulating results of the samplewise multiplying over the extended processing window.

25. A method according to claim 21, wherein:

the decoding involves i) multiplication of portions of the resultant signals of the demodulation with portions of at least one reference signal that varies over of a time duration corresponding to the extended processing window and ii) accumulation of results of the multiplication of i) over the extended processing window.

26. A method according to claim 21, wherein:

the timing information is encoded by a symbol clock signal that is substantially synchronous with transitions between symbols in the sequence of symbols encoded in the message.