Code division multiplex signal receiving apparatus and code division multiplex transmitting and receiving system
First Claim
1. A code division multiplex signal receiving apparatus for use in a code division multiplex transmitting and receiving system, for receiving a clocked code division multiplex signal generated by combining a code division multiplex signal with a clock signal having a frequency equal to a null frequency disposed in a void in a frequency spectrum of the code division multiplex signal, comprising:
- a bandpass filter that extracts a first frequency component of the clocked code division multiplex signal, the first frequency component including the frequency of the clock signal;
a clock recovery device that recovers the clock signal from the first frequency component;
a band elimination filter that eliminates a second frequency component including the frequency of the clock signal from the clocked code division multiplex signal to obtain a received code division multiplex signal;
a received signal processor that processes the received code division multiplex signal in synchronization with the clock signal recovered by the clock recovery device;
whereinthe code division multiplex signal is organized into frames having a first length, and the received signal processor includes a gating unit operable in synchronization with the recovered clock signal to open and close a window having a second length greater than the first length and to pass the received code division multiplex signal only while the window is open, andthe bandpass filter has a passband width substantially equal to a reciprocal of a difference between the first length and the second length.
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Accused Products
Abstract
In a code division multiplex transmitting and receiving system, the transmitting apparatus inserts a clock signal in the code division multiplex signal. The clock signal has a frequency equal to a null frequency in the frequency spectrum of the code division multiplex signal. The receiving apparatus extracts this frequency component from the received signal and recovers the clock signal, using an ordinary clock recovery device of the type designed to recover a clock signal from a bi-level signal. The recovered clock signal is used as a synchronizing signal in the processing of the received signal.
5 Citations
7 Claims
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1. A code division multiplex signal receiving apparatus for use in a code division multiplex transmitting and receiving system, for receiving a clocked code division multiplex signal generated by combining a code division multiplex signal with a clock signal having a frequency equal to a null frequency disposed in a void in a frequency spectrum of the code division multiplex signal, comprising:
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a bandpass filter that extracts a first frequency component of the clocked code division multiplex signal, the first frequency component including the frequency of the clock signal; a clock recovery device that recovers the clock signal from the first frequency component; a band elimination filter that eliminates a second frequency component including the frequency of the clock signal from the clocked code division multiplex signal to obtain a received code division multiplex signal; a received signal processor that processes the received code division multiplex signal in synchronization with the clock signal recovered by the clock recovery device;
whereinthe code division multiplex signal is organized into frames having a first length, and the received signal processor includes a gating unit operable in synchronization with the recovered clock signal to open and close a window having a second length greater than the first length and to pass the received code division multiplex signal only while the window is open, and the bandpass filter has a passband width substantially equal to a reciprocal of a difference between the first length and the second length. - View Dependent Claims (2)
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3. A code division multiplex transmitting and receiving system, comprising:
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a code division multiplexed transmitting apparatus including; a code division multiplex signal transmitting section for encoding transmit signals on a plurality of channels to generate respective coded transmit signals, and multiplexing the coded transmit signals to generate a code division multiplex signal, a clock signal generator for generating and outputting a clock signal having a frequency equal to a null frequency disposed in a void in a frequency spectrum of the code division multiplex signal, and a clock signal combiner for combining the code division multiplex signal and the clock signal to generate a clocked code division multiplex signal and transmitting the clocked code division multiplex signal to the code division multiplex signal receiving apparatus; and a code division multiplex signal receiving apparatus including; a code division multiplex signal splitter for receiving the clocked code division multiplex signal and splitting the clocked code division multiplex signal into a first clocked code division multiplex signal and a second clocked code division multiplex signal, band elimination filter for receiving the first clocked code division multiplex signal and eliminating a first frequency component including the frequency of the clock signal to obtain a coded received signal, a received signal processor for receiving the coded received signal, decoding the coded received signal, recovering the received signal, and outputting the received signal, the received signal processor including a decoding unit for decoding the coded received signal and outputting the decoded received signal, a gating processor for gating the decoded received signal, and a header remover for eliminating a header of the decoded received signal output from the gating processor and outputting the received signal; a bandpass filter for receiving the second clocked code division multiplex signal, extracting a second frequency component including the frequency of the clock signal from the second clocked code division multiplex signal, and outputting the second frequency component; and a clock recovery device for recovering the clock signal from the second frequency component;
whereinthe code division multiplex signal is organized into frames having a first length, and the gating processor operates in synchronization with the recovered clock signal to open and close a window having a second length greater than the first length and to pass the received code division multiplex signal only while the window is open, and the bandpass filter has a passband width substantially equal to a reciprocal of a difference between the first length and the second length. - View Dependent Claims (4, 5, 6, 7)
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Specification