Circuit with noise shaper

• US 8,076,978 B2
• Filed: 11/13/2008
• Issued: 12/13/2011
• Est. Priority Date: 11/13/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Da Dalt, Nicola, Thaller, Edwin
• Primary Examiner(s): Chang, Joseph
• Assistant Examiner(s): Tan, Richard
• Application Number:
  US12/270,584
• Publication Number:
  US 20100117743A1
• Time in Patent Office: 1,125 Days
• Field of Search: 331/1.A, 331/1.R, 331/16, 331/17, 331/18, 331/25, 331/34, 331/117.R
• US Class Current: 331/1.A
• CPC Class Codes: H03L 2207/50 All digital phase-locked loop
• CPC Class Codes: H03L 7/16 Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop

Abstract

In an embodiment, a circuit comprising an oscillator is provided. The oscillator is controlled based on a feedback value and an input reference value. The feedback value or the reference value or both are generated using noise shaping.

Claims

1. A circuit, comprising:

an oscillator configured to generate an output signal, said output signal having a frequency;

a feedback value generator coupled to said oscillator, said feedback value generator comprising a noise shaper circuit and being configured to generate a feedback value depending on said output signal, the feedback value being noise shaped, wherein said feedback value generator comprises;

a phase shifter circuit configured to shift a phase of said output signal controlled by said noise shaper circuit and to output a phase shifted output signal, and

a phase quantizer configured to receive said phase shifted output signal;

a reference value generator configured to generate a reference value depending on a predetermined value;

a combiner configured to combine said reference value and said feedback value, and to output a combined value; and

a loop filter configured to generate a control signal to control said oscillator depending on said combined signal.

2. The circuit of claim 1,

wherein said oscillator is a digitally controlled oscillator.

3. The circuit of claim 1, wherein said feedback value generator further comprises a differentiator coupled between said phase quantizer and said combiner.

4. The circuit of claim 1,

wherein said loop filter comprises a modulator configured to modulate said control signal based on said output signal.

5. A circuit, comprising:

an oscillator comprising a control input and an output,

a reference clock input,

a phase quantizer comprising an input, an output and a clock input, said input of said phase quantizer being coupled with said output of said oscillator and said clock input of said phase quantizer being coupled with said reference clock input,

a first storage and a second storage,

a noise shaper circuit comprising an input, an output and a clock input, said input of said noise shaper being coupled with said second storage, and

a combiner comprising a first input, a second input, a third input and an output, a first input of said combiner being coupled with said first storage, a second input of said combiner being coupled with said output of said noise shaper and a third input of said combiner being coupled with said output of said phase quantizer, and

a loop filter comprising an input, an output and a clock input, said clock input of said loop filter being coupled with said reference clock, said output of said loop filter being coupled with said control input of said oscillator and said input of said loop filter being coupled with said output of said combiner.

6. The circuit of claim 5,

wherein said combiner comprises at least one subtractor.

7. The circuit of claim 5,

wherein said first storage stores an integer value and said second storage stores a value selected from the interval from 0 and 1, including 0.

8. The circuit of claim 5, further comprising a first integrator coupled between said first storage and said first input of said combiner and a second integrator coupled between said output of said noise shaper and said second input of said combiner.

9. The circuit of claim 5, further comprising a differentiator coupled between said output of said phase quantizer and said third input of said combiner.

10. The circuit of claim 5,

further comprising a sampling circuit comprising an input, a clock input and an output, wherein said clock input of said sampling circuit is coupled with said output of said oscillator, wherein said input of said sampling circuit is coupled with said reference clock input and wherein said output of said sampling circuit is coupled with at least one clock input selected from the group comprising said clock input of said noise shaper circuit and said clock input of said loop filter.

11. A circuit, comprising:

an oscillator comprising an output and a control input,

a phase shifter circuit comprising an input, an output and a control input, said input of said phase shifter circuit being coupled with said output of said oscillator,

a noise shaper circuit comprising an output and a clock input, said output of said noise shaper circuit being coupled with said control input of said phase shifter circuit and said clock input of said noise shaper circuit being coupled with a reference clock input,

a phase quantizer comprising an input and an output, said input of said phase quantizer being coupled with said output of said phase shifter,

a storage comprising an output,

a combiner comprising a first input, a second input and an output, said first input of said combiner being coupled with said output of said storage and said second input of said combiner being coupled with said output of said phase quantizer, and

a loop filter comprising an input and an output, said input of said loop filter being coupled with said output of said combiner and said output of said loop filter being coupled with said control input of said oscillator.

12. The circuit of claim 11,

wherein said combiner comprises at least one subtractor.

13. The circuit of claim 11,

wherein said loop filter comprises a clock input coupled with said reference clock input and wherein said phase quantizer comprises a clock input coupled with said reference clock input.

14. The circuit of claim 11, further comprising a differentiator coupled between said output of said phase quantizer and said second input of said combiner.

15. The circuit of claim 11, further comprising an integrator coupled between said output of said storage and said input of said combiner.