Semiconductor device manufacturing method and silicon oxide film forming method

• US 8,080,463 B2
• Filed: 01/21/2010
• Issued: 12/20/2011
• Est. Priority Date: 01/23/2009
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Iwasawa, Kazuaki, Hoshi, Takeshi, Nakazawa, Keisuke, Nakao, Takashi, Kato, Ryu, Kai, Tetsuya, Sekine, Katsuyuki, Matsuo, Shogo
• Primary Examiner(s): Garber, Charles
• Assistant Examiner(s): MUSTAPHA, ABDULFATTAH B
• Application Number:
  US12/691,483
• Publication Number:
  US 20100190317A1
• Time in Patent Office: 698 Days
• Field of Search: 438/423, 438/424, 257/E21.546, 257/E21.547
• US Class Current: 438/423
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Abstract

A semiconductor device manufacturing method has forming element isolation trenches in a semiconductor substrate, forming a silicon compound film in insides of the element isolation trenches in order to embed the element isolation trenches, conducting a first oxidation processing at a first temperature to reform a surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms, and conducting a second oxidation processing at a second temperature which is higher than the first temperature to form a coated silicon oxide film inside the element isolation trenches.

Claims

1. A semiconductor device manufacturing method comprising:

forming an element isolation trench in a semiconductor substrate;

forming a silicon compound film in insides of the element isolation trench in order to embed the element isolation trench before a first oxidation process;

conducting the first oxidation process to reform a surface of the silicon compound film; and

conducting a second oxidation process to form a coated silicon oxide film from the silicon compound film,

wherein the first oxidation process at a first temperature reforms the surface of the silicon compound film to a volatile matter emission preventing layer which permits passage of an oxidizing agent and impurities and which does not permit passage of a volatile matter containing silicon atoms; and

wherein the second oxidation process is conducted at a second temperature which is higher than the first temperature.

2. The semiconductor device manufacturing method according to claim 1, wherein the silicon compound film is either polysilazane (polyperhydrosilazane) or hydrogen silses quioxane (HSQ).

3. The semiconductor device manufacturing method according to claim 1, wherein the first oxidation processing is either ozone oxidation, oxygen radical irradiation, or oxygen ion implantation.

4. The semiconductor device manufacturing method according to claim 2, wherein the first oxidation processing is either ozone oxidation, oxygen radical irradiation, or oxygen ion implantation.

5. The semiconductor device manufacturing method according to claim 1, further comprising:

after the second oxidation process,

conducting a third oxidation process at a third temperature.

6. The semiconductor device manufacturing method according to claim 5, further comprising:

after the third oxidation process,

conducting heating processing at a temperature which is higher than the third temperature.

7. The semiconductor device manufacturing method according to claim 2, further comprising:

after the second oxidation process,

conducting a third oxidation process at a third temperature.

8. The semiconductor device manufacturing method according to claim 1,

wherein an impurity diffusion preventing film is formed on a surface of the element isolation trench, and the silicon compound film is formed in insides of the element isolation trench in order to embed the element isolation trench.

9. The semiconductor device manufacturing method according to claim 8, wherein the element isolation trench includes a gate insulation film and a gate electrode formed on the semiconductor substrate, and the impurity diffusion preventing film is formed on a side wall of the gate electrode.

10. The semiconductor device manufacturing method according to claim 8, wherein the impurity diffusion preventing film is formed by using a CVD method.

11. The semiconductor device manufacturing method according to claim 8, wherein the impurity diffusion preventing film is a silicon oxide film.

12. The semiconductor device manufacturing method according to claim 1, further comprising conducting a warm water processing process between the first oxidation process and the second oxidation process.

13. The semiconductor device manufacturing method according to claim 1, further comprising conducting a third oxidation process after the coated silicon oxide film is formed.

14. The semiconductor device manufacturing method according to claim 1, wherein the second oxidation process is an oxidation conducted in a steam (H₂O) atmosphere or an oxide atmosphere.

15. The semiconductor device manufacturing method according to claim 1, wherein the first oxidation process is an oxygen radical irradiation that irradiates oxygen radicals and OH radicals.