Wafer level package structure and production method therefor

• US 8,080,869 B2
• Filed: 11/24/2006
• Issued: 12/20/2011
• Est. Priority Date: 11/25/2005
• Status: Expired due to Fees

• Current Assignee: Panasonic Electric Works Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Electric Works Company Limited (Panasonic Holdings Corporation)
• Inventors: Okudo, Takafumi, Suzuki, Yuji, Takegawa, Yoshiyuki, Baba, Toru, Gotou, Kouji, Miyajima, Hisakazu, Kataoka, Kazushi, Saijo, Takashi
• Primary Examiner(s): ARORA, AJAY
• Application Number:
  US12/094,600
• Publication Number:
  US 20090159997A1
• Time in Patent Office: 1,852 Days
• Field of Search: 257/704
• US Class Current: 257/704
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2201/0242 Gyroscopes
• CPC Class Codes: B81B 7/0048 between the MEMS die and the substrate
• CPC Class Codes: B81B 7/0051 between the package lid and the substrate
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: B81C 2203/038 Bonding techniques not provided for in B81C2203/031 - B81C2203/037
• CPC Class Codes: G01P 1/023 for acceleration measuring devices
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/123 by piezo-resistive elements, e.g. semiconductor strain gauges
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 15/18 in two or more dimensions
• CPC Class Codes: G01P 2015/0842 the mass being of clover leaf shape
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/83895 between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2224/83896 between electrically insulating surfaces, e.g. oxide or nitride layers
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01079 : Gold [Au]

Abstract

A wafer level package structure, in which a plurality of compact sensor devices with small variations in sensor characteristics are formed, and a method of producing the same are provided. This package structure has a semiconductor wafer having plural sensor units, and a package wafer bonded to the semiconductor wafer. The semiconductor wafer has a first metal layer formed with respect to each of the sensor units. The package wafer has a bonding metal layer at a position facing the first metal layer. Since a bonding portion between the semiconductor wafer and the package wafer is formed at room temperature by a direct bonding between activated surfaces of the first metal layer and the bonding metal layer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding portion.

Claims

1. A wafer level package structure comprising:

a semiconductor wafer having a plurality of sensor units; and

a package wafer bonded to a surface of said semiconductor wafer;

wherein said semiconductor wafer has a first metal layer formed on each of said sensor units;

said package wafer has a bonding metal layer on a position facing said first metal layer; and

the bonding between said semiconductor wafer and said package wafer comprises a solid-phase direct bonding without diffusion between an activated surface of said first metal layer and an activated surface of said bonding metal layer,

wherein each of said sensor units comprises a frame having an opening, a movable portion held in said opening to be movable relative to said frame, and a detecting portion configured to output an electric signal according to a positional displacement of said movable portion,

wherein at least one of said first metal layer and said bonding metal layer comprises a ring-like outer metal layer formed around said movable portion, and a ring-like inner metal layer formed at an inner side of said outer metal layer around said movable portion,

wherein each of said first metal layer and said bonding metal layer comprises said outer metal layer, said inner metal layer, and an auxiliary sealing layer connecting between said outer metal layer and said inner metal layer, which is formed at plural locations spaced from each other by a predetermined distance in a circumferential direction of said inner metal layer, and

each of a bonding between said outer metal layers, a bonding between said inner metal layers, and a bonding between said auxiliary sealing layers is provided by the solid-phase direct bonding.

2. The wafer level package structure as set forth in claim 1, wherein the activated surfaces of said first metal layer and said bonding metal layer are provided by any one of a plasma-treated surface, an ion-beam irradiated surface, and an atomic-beam irradiated surface.

3. The wafer level package structure as set forth in claim 1, wherein said first metal layer and said bonding metal layer are made of a same metal material selected from gold, copper and aluminum.

4. The wafer level package structure as set forth in claim 1, wherein each of said first metal layer and said bonding metal layer is made of gold, and has a thickness of 500 nm or less.

5. The wafer level package structure as set forth in claim 1, wherein said first metal layer comprises an intermediate layer made of any one of Ti and Cr formed on said semiconductor wafer, and an Au film formed on said intermediate layer,

said bonding metal layer comprises an intermediate layer made of any one of Ti and Cr formed on said package wafer, and an Au film formed on said intermediate layer, and

the bonding between said first metal layer and said bonding metal layer is the solid-phase direct bonding between activated surfaces of said Au films.

6. The wafer level package structure as set forth in claim 1, wherein said sensor unit further comprises an integrated circuit operable in collaboration with said detecting portion.

7. The wafer level package structure as set forth in claim 1, wherein said first metal layer is formed on a surface facing said package wafer of said frame of each of said sensor units over an entire circumference of said frame so as to surround said movable portion, and said bonding metal layer is formed on a region facing said first metal layer of said package wafer.

8. The wafer level package structure as set forth in claim 1, wherein said frame of each of said sensor units has a second metal layer electrically connected to said detecting portion,

said package wafer has a concave portion formed in a region facing said movable portion of each of said sensor units, a through-hole wiring formed in a bottom of said concave portion, and an intermediate wiring layer connected at its one end to said through-hole wiring,

said through-hole wiring is electrically connected to said second metal layer through said intermediate wiring layer, and

the electrical connection is provided by a solid-phase direct bonding without diffusion between activated surfaces of said second metal layer and said intermediate wiring layer.

9. The wafer level package structure as set forth in claim 1, wherein said frame of each of said sensor units has a second metal layer electrically connected to said detecting portion,

said package wafer has a through-hole wiring, and a wiring metal layer connected at its one end to said through-hole wiring, and

said second metal layer is electrically connected to said wiring metal layer at a closer side to said movable portion than the bonding between said first metal layer and said bonding metal layer, and

the electrical connection is provided by a solid-phase direct bonding without diffusion between activated surfaces of said second metal layer and said wiring metal layer.

10. The wafer level package structure as set forth in claim 9, wherein said first metal layer, said bonding metal layer, said wiring metal layer and said second metal layer are made of a same metal material.

11. The wafer level package structure as set forth in claim 9, wherein said first metal layer and said second metal layer are formed to be flush with each other, and said bonding metal layer and said wiring metal layer are formed to be flush with each other.

12. The wafer level package structure as set forth in claim 1, further comprising a second package wafer bonded to the other surface of said semiconductor wafer,

said semiconductor wafer has a surface-activated region on a surface facing said second package wafer, and

the bonding between said second package wafer and said semiconductor wafer is a solid-phase direct bonding without diffusion between the surface-activated region of said semiconductor wafer and a surface-activated region formed on said second package wafer.

13. A sensor device obtained by cutting the wafer level package structure as set forth in claim 1 into a size of said sensor unit.