Semiconductor device having insulating film with surface modification layer and method for manufacturing the same

• US 8,080,878 B2
• Filed: 09/11/2009
• Issued: 12/20/2011
• Est. Priority Date: 09/11/2008
• Status: Expired due to Fees

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Onodera, Takahiro, Hayashi, Yoshihiro, Ueki, Makoto
• Primary Examiner(s): Parekh, Nitin
• Application Number:
  US12/557,677
• Publication Number:
  US 20100059887A1
• Time in Patent Office: 830 Days
• Field of Search: 257/759, 257/760, 257/758, 257/762, 257/E23.145
• US Class Current: 257/759
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/31633 Deposition of carbon doped silicon oxide, e.g. SiOC
• CPC Class Codes: H01L 21/31695 Deposition of porous oxides or porous glassy oxides or oxide based porous glass
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 2221/1047 the air gaps being formed by pores in the dielectric
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.

Claims

1. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film including a first SiOCH film formed on the semiconductor substrate;

a surface modification layer including a second SiOCH film formed by modifying a surface layer of the first insulating film, the second SiOCH film having a lower atomic carbon concentration and a higher atomic oxygen concentration than the first insulating film;

a metal wiring filled in a recess formed in the surface modification layer and the first insulating film; and

a second insulating film contacting surfaces of the metal wiring and the surface modification layer.

2. The semiconductor device according to claim 1, wherein the surface modification layer has a thickness equal to or larger than 3 nm and smaller than 30 nm.

3. The semiconductor device according to claim 1, wherein the first SiOCH film of the first insulating film has an atomic composition ratio expressed by C/Si that is within a range from 1 to 10.

4. The semiconductor device according to claim 1, wherein the carbon concentration in the surface modification layer is equal to or larger than 50% and smaller than 90% of the atomic carbon concentration in the first insulating film, and the atomic oxygen concentration in the surface modification layer is equal to or larger than 110% and smaller than 200% of the oxygen concentration in the first insulating film.

5. The semiconductor device according to claim 1, wherein the first insulating film has a plurality of pores, an average diameter of each of the plurality of pores is smaller than 0.8 nm, and the plurality of pores are separated from each other.

6. The semiconductor device according to claim 1, wherein the second insulating film is one of a single-layer film using any one of an SiN film, an SiCN film, and an SiC film and a lamination film using at least two of an SiN film, an SiCN film, and an SiC film.

7. The semiconductor device according to claim 1, wherein the second insulating film is one of a first film containing unsaturated hydrocarbon and amorphous carbon, and a lamination film including the first film and a second film using at least one of an SiN film, an SiCN film, and an SiC film.

8. The semiconductor device according to claim 1, wherein the first insulating film is formed using, as a material, a compound having a cyclic organic silica structure expressed by the following Formula (1):

9. The semiconductor device according to claim 8, wherein the compound having the cyclic organic silica structure is expressed by the following formula (2);

10. The semiconductor device according to claim 8, wherein the compound having the cyclic organic silica structure is expressed by the following Formula (3):

11. The semiconductor device according to claim 1, wherein the metal wiring is a wiring containing copper.

12. A semiconductor device comprising:

a semiconductor substrate;

a first insulating film including a first SiOCH film formed on the semiconductor substrate;

a surface modification layer including a second SiOCH film, the second SiOCH film having a lower atomic carbon concentration and a higher atomic oxygen concentration than the first SiOCH film;

a metal wiring filled in a recess formed in the surface modification layer and the first insulating film; and

a second insulating film contacting surfaces of the metal wiring and the surface modification layer.

13. The semiconductor device according to claim 12, wherein the surface modification layer has a concentration profile in which the carbon concentration decreases from the first insulating film toward the second insulating film while the oxygen concentration increases from the first insulating film toward the second insulating film.

14. A semiconductor device according to claim 12, wherein the second insulating film is one of a single-layer film using any one of an SiN film, an SiCN film, and an SiC film and a lamination film using at least two of an SiN film, an SiCN film, and an SiC film.