Canceling harmonics in semiconductor RF switches
First Claim
1. A method of canceling unwanted harmonic signal component Sh1 at a frequency Fsh that is a selected harmonic of an operating frequency Fo of a signal Sc, the method comprising:
- a) conducting the signal Sc via an integrated semiconductor RF signal switching circuit along a signal conduction path Psc from an input node Nin to an output node Nout;
b) contemporaneously conducting a compensation current Icc between Psc and an AC reference voltage vref via a compensation nonlinear impedance Znlc not modulated by the signal Sc, the nonlinearity of Znlc enhancing a suitability of Icc for compensation;
c) developing a compensating harmonic signal Sh2 at the frequency Fsh as a component of Sc due to conduction of Icc through an impedance distinct from Znlc;
d) wherein Sh2 has a phase and amplitude at Fsh related to a phase and amplitude of Sh1 at Fsh such that a sum of Sh1 plus Sh2 has a lower amplitude at Fsh than does Sh1 alone, across a target range of Sc amplitude.
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Accused Products
Abstract
An RF switching circuit adapted to cancel selected harmonic signals. An unwanted harmonic signal Sh1 at a selected harmonic frequency Fsh of an operating frequency Fo exists in a signal Si conducted by the switching circuit, possibly produced by the switching circuit due to conduction through a first nonlinear impedance Znl(1). A compensating harmonic signal Sh2 is therefore generated by conduction via a nonlinear impedance Znl(2). Znl(1) may be due to parasitic conduction by “off” switching elements, while Znl(2) may be due to conduction by an “on” FET. The amplitude and/or phasing of Sh2 may be adjusted by selecting components for a network coupling Znl(2) to the conducted signal Si, such that Sh2 substantially cancels Sh1 across a target range of input power.
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Citations
20 Claims
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1. A method of canceling unwanted harmonic signal component Sh1 at a frequency Fsh that is a selected harmonic of an operating frequency Fo of a signal Sc, the method comprising:
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a) conducting the signal Sc via an integrated semiconductor RF signal switching circuit along a signal conduction path Psc from an input node Nin to an output node Nout; b) contemporaneously conducting a compensation current Icc between Psc and an AC reference voltage vref via a compensation nonlinear impedance Znlc not modulated by the signal Sc, the nonlinearity of Znlc enhancing a suitability of Icc for compensation; c) developing a compensating harmonic signal Sh2 at the frequency Fsh as a component of Sc due to conduction of Icc through an impedance distinct from Znlc; d) wherein Sh2 has a phase and amplitude at Fsh related to a phase and amplitude of Sh1 at Fsh such that a sum of Sh1 plus Sh2 has a lower amplitude at Fsh than does Sh1 alone, across a target range of Sc amplitude. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A monolithic RF signal switching integrated circuit comprising:
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a) an input node Nin configured to receive an input signal Si having an amplitude Pin at an operating frequency Fo; b) a signal conduction path Psc that is selectable to couple the input signal Si at Nin to an output node Nout via a switching element including a channel of a transistor controllably biased to an “
on”
state as an output signal So; andc) compensation circuitry configured to contemporaneously generate a harmonic compensation signal Sch to cancel part of an unwanted harmonic distortion signal Sdh from So, the compensation circuitry including a compensation harmonic path Pch that conducts current from Si to an AC reference voltage vref via a compensation nonlinear impedance Znlc not modulated by the input signal Si, the nonlinearity of Znlc enhancing compensation of Sdh by Sch. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. An integrated circuit apparatus for coupling RF signals from a selectable one of a plurality of input nodes including Nin to an output node Nout, comprising:
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a) means for inducing an unwanted harmonic signal Sh1 onto an input signal coupled to Nout, the means including an integrated semiconductor RF signal switching circuit; and b) compensation means for contemporaneously inducing a compensating harmonic signal Sh2 onto the input signal coupled to Nout, such that a magnitude of (Sh1+Sh2) is lower at a selected harmonic frequency Fsh for a target range of amplitude of the input signal, the compensation means including a compensation harmonic path Pch that is configurable to conduct a compensation current Icc from Nout to a reference voltage vref via a compensation nonlinear impedance Znlc not modulated by the signal Sc having a nonlinearity that introduces compensating harmonic content to Sh2.
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Specification