IGBT/FET-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation
First Claim
1. An IGBT/FET-based energy savings device comprising:
- at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device, wherein said at least one analog signal is an AC signal;
at least one sensing means connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;
at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;
at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at least one analog signal;
said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;
at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and
at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced amount of energy out of said energy savings device;
wherein said at least one drive control comprises a first IGBT/FET device configured for providing pulse width modulation to said at least one positive half cycle of said at least one analog signal, a second IGBT/FET device configured for providing pulse width modulation to said at least one negative half cycle of said at least one analog signal, and a first IGBT/FET shunt control transistor and a second IGBT/FET shunt control transistor configured as routing switches to clamp a back electromagnetic field;
wherein a first diode is connected across said first IGBT/FET device, and a second diode is connected across said second IGBT/FET device;
wherein said second diode is configured to be conducting said at least one positive half cycle of said at least one analog signal and said second IGBT/FET device is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said first diode is configured to be conducting said at least one negative half cycle of said at least one analog signal and said first IGBT/FET device is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation; and
wherein said first IGBT/FET shunt control transistor is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said second IGBT/FET shunt control transistor is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation.
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Abstract
An IGBT/FET-based energy savings device, system and method (1) wherein a predetermined amount of voltage below a nominal line voltage and/or below a nominal appliance voltage is saved, thereby conserving energy. Phase input connections (2) are provided for inputting analog signals into the device and system (1). A magnetic flux concentrator (3) senses the incoming analog signal (20) and a volts zero crossing point detector (5) determines the zero volts crossing point (21) of the signal (20). The positive half cycle (22) and negative half cycle (23) of the signal (20) are identified and routed to a digital signal processor (10) for processing the signal (20). The signal (20) is reduced by pulse width modulation and the reduced amount of energy is outputted, thereby yielding an energy savings for an end user.
276 Citations
77 Claims
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1. An IGBT/FET-based energy savings device comprising:
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at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device, wherein said at least one analog signal is an AC signal; at least one sensing means connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device; at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal; at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal; at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at least one analog signal; said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal; at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced amount of energy out of said energy savings device; wherein said at least one drive control comprises a first IGBT/FET device configured for providing pulse width modulation to said at least one positive half cycle of said at least one analog signal, a second IGBT/FET device configured for providing pulse width modulation to said at least one negative half cycle of said at least one analog signal, and a first IGBT/FET shunt control transistor and a second IGBT/FET shunt control transistor configured as routing switches to clamp a back electromagnetic field; wherein a first diode is connected across said first IGBT/FET device, and a second diode is connected across said second IGBT/FET device; wherein said second diode is configured to be conducting said at least one positive half cycle of said at least one analog signal and said second IGBT/FET device is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said first diode is configured to be conducting said at least one negative half cycle of said at least one analog signal and said first IGBT/FET device is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation; and wherein said first IGBT/FET shunt control transistor is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said second IGBT/FET shunt control transistor is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. An IGBT/FET-based energy savings device comprising:
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at least one power supply unit in electrical connection with said energy savings device for powering said energy savings device; at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device; at least one sensing means connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device via galvanic isolation; at least one analog signal conditioning device for conditioning said at least one analog signal of said energy exiting said at least one magnetic flux concentrator; at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal; at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal; at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at least one analog signal; said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal; at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy to yield a reduced amount of energy by providing pulse width modulation to the at least one analog signal; at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device; at least one reset switch in electrical connection with said at least one digital signal processor; at least one USB communications interface in electrical connection with said at least one digital signal processor; and at least computing device in electrical connection with said energy savings device; wherein said at least one drive control comprises a first IGBT/FET device configured for providing pulse width modulation to said at least one positive half cycle of said at least one analog signal, a second IGBT/FET device configured for providing pulse width modulation to said at least one negative half cycle of said at least one analog signal, and a first IGBT/FET shunt control transistor and a second IGBT/FET shunt control transistor configured as routing switches to clamp a back electromagnetic field; wherein a first diode is connected across said first IGBT/FET device, and a second diode is connected across said second IGBT/FET device; wherein said second diode is configured to be conducting said at least one positive half cycle of said at least one analog signal and said second IGBT/FET device is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said first diode is configured to be conducting said at least one negative half cycle of said at least one analog signal and said first IGBT/FET device is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation; wherein said first IGBT/FET shunt control transistor is configured to be in an on condition when said first IGBT/FET device is providing pulse width modulation, and said second IGBT/FET shunt control transistor is configured to be in an on condition when said second IGBT/FET device is providing pulse width modulation; wherein said at least one logic device is configured to work in real time to insure that said second IGBT/FET shunt control transistor is in an off condition and said second IGBT/FET device and said first IGBT/FET shunt control transistor are in an on condition when said first IGBT/FET device is providing pulse width modulation; and wherein said at least one logic device is configured to insure that said first IGBT/FET shunt control transistor is in an off condition and said first IGBT/FET device and said second IGBT/FET shunt control transistor are in an on condition when said second IGBT/FET device is providing pulse width modulation. - View Dependent Claims (30)
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31. An IGBT/FET-based energy savings system comprising:
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a means for inputting a predetermined amount of incoming energy into said energy savings system; a means for sensing said predetermined amount of incoming energy entered into said energy savings system; a means for conditioning at least one analog signal of said energy; a means for determining at least one volts zero crossing point of said at least one conditioned analog signal; a means for identifying at least one positive half cycle and at least one negative half cycle of said at least one conditioned analog signal; a means for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal; a means for processing said at least one conditioned analog signal; a means for reducing said at least one conditioned analog signal of said predetermined amount of energy to yield a reduced amount of energy; and a means for outputting said reduced energy out of said energy savings system; wherein said means for reducing comprises a first IGBT/FET device configured for providing pulse width modulation to said at least one positive half cycle of said at least one conditioned analog signal, a second IGBT/FET device configured for providing pulse width modulation to said at least one negative half cycle of said at least one conditioned analog signal, and a first IGBT/FET shunt control transistor and a second IGBT/FET shunt control transistor configured as routing switches to clamp a back electromagnetic field; and wherein a first diode is connected across said first IGBT/FET device, and a second diode is connected across said second IGBT/FET device. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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51. A method for using an IGBT/FET-based energy savings device comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one alternating current analog signal into said energy savings device;
- at least one sensing means connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;
at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;
at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at least one analog signal;
said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;
at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and
at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps of;a. inputting a predetermined amount of energy having at least one analog signal into said energy savings device; b. sensing said predetermined amount of energy entered into said energy savings device; c. determining at least one volts zero crossing point of said at least one analog signal; d. identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal; e. routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor; f. processing said at least one analog signal; g. providing pulse width modulation to said at least one positive half cycle of said at least one analog signal with a first IGBT/FET device of said at least one drive control; h. providing pulse width modulation to said at least one negative half cycle of said at least one analog signal with a second IGBT/FET device of said at least one drive control; i. conducting said at least one negative half cycle of said at least one analog signal with a first diode connected across said first IGBT/FET device; j. conducting said at least one positive half cycle of said at least one analog signal with a second diode connected across said second IGBT/FET device; k. turning on said second IGBT/FET device when said first IGBT/FET device is providing pulse width modulation; l. turning on said first IGBT/FET device when said second IGBT/FET device is providing pulse width modulation; m. turning on a first IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said first IGBT/FET device is providing pulse width modulation; n. turning on a second IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said second IGBT/FET device is providing pulse width modulation; o. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal; and p. outputting said reduced amount of energy out of said energy savings device. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66)
- at least one sensing means connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
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67. A method for using an IGBT/FET-based energy savings comprising a means for inputting a predetermined amount of energy into said energy savings system;
- a means for sensing said predetermined amount of energy entered into said energy savings system;
a means for conditioning at least one AC analog signal of said energy;
a means for determining at least one volts zero crossing point of said at least one conditioned analog signal;
a means for identifying at least one positive half cycle and at least one negative half cycle of said at least one conditioned analog signal;
a means for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;
a means for processing said at least one conditioned analog signal;
a means for reducing said at least one conditioned analog signal of said predetermined amount of energy; and
a means for outputting said reduced energy out of said energy savings system, said method comprising steps of;a. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings system; b. sensing said predetermined amount of incoming energy entered into said energy savings system; c. determining at least one volts zero crossing point of said at least one analog signal; d. identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal; e. routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor; f. processing said at least one analog signal; g. providing pulse width modulation to said at least one positive half cycle of said at least one analog signal with a first IGBT/FET device of said at least one drive control; h. providing pulse width modulation to said at least one negative half cycle of said at least one analog signal with a second IGBT/FET device of said at least one drive control; i. conducting said at least one negative half cycle of said at least one analog signal with a first diode connected across said first IGBT/FET device; j. conducting said at least one positive half cycle of said at least one analog signal with a second diode connected across said second IGBT/FET device; k. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and l. outputting said reduced amount of energy out of said energy savings system. - View Dependent Claims (68, 69)
- a means for sensing said predetermined amount of energy entered into said energy savings system;
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70. A method for using an IGBT/FET-based energy savings comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one AC analog signal into said energy savings device;
- at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;
at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;
at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;
said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;
at least one voltage reducing means in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and
at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps ofa. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device; b. sensing said predetermined amount of incoming energy entered into said energy savings device; c. determining at least one volts zero crossing point of said at least one analog signal; d. identifying at least one positive half cycle of said at least one analog signal; e. routing said at least one positive half cycle of said at least one analog signal to said at least one digital signal processor; f. processing said at least one analog signal; g. providing pulse width modulation to said at least one positive half cycle of said at least one analog signal with a first IGBT/FET device of said at least one drive control; h. providing pulse width modulation to said at least one negative half cycle of said at least one analog signal with a second IGBT/FET device of said at least one drive control; i. conducting said at least one negative half cycle of said at least one analog signal with a first diode connected across said first IGBT/FET device; j. conducting said at least one positive half cycle of said at least one analog signal with a second diode connected across said second IGBT/FET device; k. turning on said second IGBT/FET device when said first IGBT/FET device is providing pulse width modulation; l. turning on said first IGBT/FET device when said second IGBT/FET device is providing pulse width modulation; m. turning on a first IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said first IGBT/FET device is providing pulse width modulation; n. turning on a second IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said second IGBT/FET device is providing pulse width modulation; o. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and p. outputting said reduced amount of energy out of said energy savings device. - View Dependent Claims (71, 72)
- at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
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73. A method for using an IGBT/FET-based energy savings comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;
- at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;
at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;
at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;
said at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;
at least one voltage reducing means in electrical connection with said at least one digital signal processor for reducing said predetermined amount of energy by providing pulse width modulation to the at least one analog signal; and
at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps of;a. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device; b. sensing said predetermined amount of incoming energy entered into said energy savings device; c. determining at least one volts zero crossing point of said at least one analog signal; d. identifying at least one negative half cycle of said at least one analog signal; e. routing said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor; f. processing said at least one analog signal; g. providing pulse width modulation to said at least one positive half cycle of said at least one analog signal with a first IGBT/FET device of said at least one drive control; h. providing pulse width modulation to said at least one negative half cycle of said at least one analog signal with a second IGBT/FET device of said at least one drive control; i. conducting said at least one negative half cycle of said at least one analog signal with a first diode connected across said first IGBT/FET device; j. conducting said at least one positive half cycle of said at least one analog signal with a second diode connected across said second IGBT/FET device; k. turning on said second IGBT/FET device when said first IGBT/FET device is providing pulse width modulation; l. turning on said first IGBT/FET device when said second IGBT/FET device is providing pulse width modulation; m. turning on a first IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said first IGBT/FET device is providing pulse width modulation; n. turning on a second IGBT/FET shunt control transistor configured as a routing switch to clamp a back electromagnetic field when said second IGBT/FET device is providing pulse width modulation; o. working said at least one logic device in real time to insure that said second IGBT/FET shunt control transistor is in an off condition and said second IGBT/FET device and said first IGBT/FET shunt control transistor are in an on condition when said first IGBT/FET device is providing pulse width modulation; p. working said at least one logic device in real time to insure that said first IGBT/FET shunt control transistor is in an off condition and said first IGBT/FET device and said second IGBT/FET shunt control transistor are in an on condition when said second IGBT/FET device is providing pulse width modulation; q. reducing said predetermined amount of incoming energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and r. outputting said reduced amount of energy out of said energy savings device. - View Dependent Claims (74, 75, 76, 77)
- at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;
Specification