Program and verify method of nonvolatile memory device

• US 8,085,600 B2
• Filed: 02/17/2009
• Issued: 12/27/2011
• Est. Priority Date: 05/13/2008
• Status: Expired due to Fees

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Kang, Young Su
• Primary Examiner(s): Nguyen, Viet Q
• Application Number:
  US12/372,337
• Publication Number:
  US 20090285026A1
• Time in Patent Office: 1,043 Days
• Field of Search: 365/185.25, 365/185.23, 365/185.24, 365/185.22, 365/203, 365/230.03, 365/230.06
• US Class Current: 365/185.25
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits

Abstract

A program and verify method of a nonvolatile memory device, which can minimize the time taken for program and verify operations. The program and verify method includes precharging an output terminal of a block selector to a second level, making the output terminal of the block selector float, and, in the state where the output terminal floats, sequentially applying a program voltage and a verify voltage through a global word line.

Claims

1. A program and verify method of a nonvolatile memory device, comprising:

precharging an output terminal of a block selector to a second level by applying first and second control signals of a first level, which is higher than the second level, to a block switch;

making the output terminal of the block selector float; and

applying a program voltage and a verify voltage sequentially through a global word line in the state where the output terminal floats.

2. The program and verify method of claim 1, further comprising sequentially applying the program voltage and the verify voltage until a program operation is completed.

3. The program and verify method of claim 1, wherein the floating of the output terminal of the block selector includes stopping application of first and second control signals to the block switch.

4. The program and verify method of claim 1, wherein the sequential application of the program voltage and the verify voltage includes:

boosting voltage of the output terminal of the block selector to a third level according to the application of the program voltage;

turning on a high voltage switching unit according to the boosted voltage of the output terminal; and

transferring voltage of the global word line to a local word line.

5. The program and verify method of claim 1, further including, when voltage of the output terminal of the block selector shifts to a critical value or less, repeating the precharging of the output terminal of the block selector to the second level.