Optical alignment methods for forming LEDs having a rough surface

• US 8,088,633 B2
• Filed: 12/02/2009
• Issued: 01/03/2012
• Est. Priority Date: 12/02/2009
• Status: Expired due to Fees

• Current Assignee: Veeco Instruments Incorporated
• Original Assignee: Ultratech Incorporated (Veeco Instruments Incorporated)
• Inventors: Hsieh, Robert L., Nguyen, Khiem, Flack, Warren W., Hawryluk, Andrew M.
• Primary Examiner(s): Richards, N Drew
• Assistant Examiner(s): Jung, Michael
• Application Number:
  US12/592,735
• Publication Number:
  US 20110129948A1
• Time in Patent Office: 762 Days
• Field of Search: 438/16
• US Class Current: 438/16
• CPC Class Codes: G03F 9/7065 Production of alignment light, e.g. light source, control of coherence, polarization, pulse length, wavelength
• CPC Class Codes: G03F 9/7076 Mark details, e.g. phase grating mark, temporary mark
• CPC Class Codes: G03F 9/708 Mark formation
• CPC Class Codes: G03F 9/7084 Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness σ_S. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength λ_A that is in the range from about 2σ_S to about 8σ_S. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.

Claims

1. A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED), comprising:

forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness σ

_S;

imaging the at least one roughened wafer alignment mark with alignment light having a wavelength λ

_A that is in the range from about 2σ

_S to about 8σ

_S; and

comparing the detected image to an alignment reference to establish wafer alignment, wherein the alignment reference includes a reticle alignment mark.

2. The method of claim 1, further comprising forming the at least one roughened alignment mark using plasma etching.

3. The method of claim 1, wherein the roughened alignment mark resides below a transparent conducting layer.

4. The method of claim 1, further comprising forming at least one electrical contact on the wafer based on the established wafer alignment.

5. The method of claim 1, wherein λ

_LED is a wavelength of light to be emitted by the LED, n is a refractive index of a layer that supports the at least one roughened alignment mark, and wherein σ

_S is in one of the following ranges;

a) from about 2λ

_LED/n to about 8λ

_LED and

b) from about (0.5)λ

_LED/n to about λ

_LED/n;

or

c) from about 2λ

_LED to about 8λ

_LED.

6. The method of claim 1, wherein the alignment light wavelength λ

_A is in the range from about 1 μ

m to about 2 μ

m.

7. The method of claim 1, wherein the established wafer alignment comprises an enhanced global alignment.

8. A method of performing wafer alignment when lithographically fabricating a light-emitting diode (LED), comprising:

forming at least one wafer alignment mark on the wafer;

forming a rough wafer surface on or above the wafer alignment mark, the rough surface having a root-mean-square (RMS) surface roughness σ

_S, wherein σ

_S is within one of the following ranges, where n is a refractive index of a layer on which the rough surface is formed;

i) from about 2λ

_LED to about 8λ

_LED;

ii) from about (0.5)λ

_ED/n to λ

_ED/n;

or

iii) from about λ

_LED/n to λ

_LED;

illuminating the at least one wafer alignment mark with alignment light having a wavelength λ

_A that is in the range from about 2σ

_S to about 8σ

_S;

forming and detecting an image of the at least one wafer alignment mark with alignment light reflected from the at least one wafer alignment mark; and

comparing the detected image to an alignment reference to establish wafer alignment.

9. The method of claim 8, further comprising forming at least one electrical contact on the rough surface based on the established wafer alignment.

10. The method of claim 8, including using a reticle alignment mark as the alignment reference, and forming a superposition of a reticle alignment mark image and the wafer alignment mark image.

11. The method of claim 8, wherein the alignment light wavelength λ

_A is in the range from about 1 μ

m to about 2 μ

m.

12. The method of claim 8, wherein forming the rough surface comprises performing a plasma etch of the wafer.

13. The method claim 8, further comprising performing enhanced global alignment using multiple wafer alignment marks.

14. The method of claim 8, wherein the rough surface is formed on at least one of a) a p-GaN layer and b) on or beneath a transparent conducting layer.

15. A method of forming at least one electrical contact on a light-emitting diode (LED) having an associated LED wavelength λ

_LED and a LED structure, comprising;

forming wafer alignment marks on an upper surface of the LED structure;

roughening the LED structure upper surface including the wafer alignment marks, thereby forming roughened wafer alignment marks, with the upper surface and roughened wafer alignment marks having a surface roughness σ

_S;

imaging the at least one roughened wafer alignment mark with alignment light having a wavelength λ

_A that is in one of a) in the range from about 2σ

_S to about 8σ

_S, b) in the range from about 1 μ

m to about 2 μ

m, and or c) in the range from about 2λ

_LED to about 8λ

_LED;

comparing the detected image to an alignment reference to establish wafer alignment, wherein the alignment reference includes a reticle alignment mark; and

forming the at least one electrical contact on the LED structure upper surface.

16. The method of claim 15, wherein the LED structure upper surface is an upper surface of a p-GaN layer and the at least one electrical contact is a p-contact.

17. The method of claim 15, wherein roughening the LED structure upper surface includes performing plasma etching.

18. The method of claim 15, wherein establishing wafer alignment includes performing pattern recognition on the detected image and the alignment reference and moving the wafer until the detected image aligns with the alignment reference.

19. The method of claim 15, further comprising the surface roughness σ

_S of the roughened wafer alignment marks being in one of the following ranges;

a) from about λ

_LED/n to about λ

_LED;

b) from about (0.5)λ

_LED/n to about λ

_LED/n;

or

c) from about 2λ

_LED to about 8λ

_LED.