Memory block management
First Claim
1. A memory controller, comprising:
- control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to;
determine defective physical blocks within the planes;
if none of the physical blocks at a particular block position are determined to be defective, assign the physical blocks at the particular block position to a super block; and
if one or more of the physical blocks at a particular block position are determined to be defective;
assign the physical blocks at the particular block position that were not determined to be defective to a super block; and
assign a respective replacement physical block to the super block for each of the one or more physical blocks at the particular block position that were determined to be defective;
wherein the respective replacement physical block is selected from a number of physical blocks within a respective one of the planes that includes a respective physical block that was determined to be defective.
8 Assignments
0 Petitions
Accused Products
Abstract
Various embodiments include one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes. Embodiments include determining defective blocks within the planes. If none of the blocks at a particular block position are determined to be defective, embodiments include assigning the blocks at the particular block position to a super block, and if one or more of the blocks at a particular block position are determined to be defective, embodiments include: assigning the blocks at the particular block position determined to be defective to a super block; and assigning a respective replacement block to the super block for each of the one or more blocks at the particular block position determined to be defective. The respective replacement block is selected from a number of blocks within a respective one of the planes that includes the respective block determined to be defective.
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Citations
30 Claims
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1. A memory controller, comprising:
control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to; determine defective physical blocks within the planes; if none of the physical blocks at a particular block position are determined to be defective, assign the physical blocks at the particular block position to a super block; and if one or more of the physical blocks at a particular block position are determined to be defective; assign the physical blocks at the particular block position that were not determined to be defective to a super block; and assign a respective replacement physical block to the super block for each of the one or more physical blocks at the particular block position that were determined to be defective;
wherein the respective replacement physical block is selected from a number of physical blocks within a respective one of the planes that includes a respective physical block that was determined to be defective.- View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A memory controller, comprising:
control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to; selectively assign at least some of the physical blocks to one of a super block of a first type and a super block of a second type; wherein the first type of super block includes only physical blocks at a respective same block position across the at least two planes; and wherein the second type of super block includes physical blocks, at a respective same block position across the at least two planes, that have not been determined to be defective, and at least one physical block, at a different block position, that replaces at least one physical block, at a particular block position, determined to be defective. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A memory controller, comprising:
control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to; selectively assign at least some of the physical blocks to one of a super block of a first type and a super block of a second type, each type of super block including no more than one physical block from a particular plane; wherein the first type of super block includes only physical blocks at a particular block position across the at least two planes; and determine if a physical block within the at least two planes of is defective; and wherein a physical block at the block position of a physical block determined to be defective, and that has not been determined to be defective, is assigned to a super block of the second type. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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21. A memory controller, comprising:
control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to; determine if a physical block within the at least two planes is defective; selectively assign at least some of the physical blocks to a respective one of the super blocks, wherein each of the super blocks has no more than one physical block from a particular plane; and wherein at least one of the super blocks includes; physical blocks at a particular block position across the at least two planes that have not been determined to be defective; and a replacement block for a physical block, at the particular block position, that has been determined to be defective, the replacement physical block selected from an assigned group of physical blocks within a same plane as the physical block determined to be defective.
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22. A method for block management in a memory system, the method comprising:
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determining defective physical blocks within a memory unit having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes; and assigning a physical block from each of the at least two planes to a respective one of the super blocks; wherein each of the super blocks includes; physical blocks, at a respective same block position of the at least two planes, that have not been determined to be defective; and if a physical block at the respective same block position is determined to be defective, a replacement block for the physical block determined to be defective, the replacement physical block selected from physical blocks within a same plane as the physical block determined to be defective. - View Dependent Claims (23, 24)
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25. A method for block management in a memory system, the method comprising:
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assigning physical blocks to a first type of super block associated with a memory unit, the memory unit having at least two different planes of physical blocks, with each super block including a physical block from each of the at least two different planes; assigning physical blocks to a second type of super block associated with the memory unit; wherein each super block of the first type includes only physical blocks at a respective block position across the at least two different planes; and wherein each super block of the second type includes a physical block at a respective block position across the at least two different planes and a physical block at a different block position, the physical block at the different block position replacing a physical block, at the respective block position, that has been determined to be defective. - View Dependent Claims (26, 27, 28)
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29. A memory controller, comprising:
control circuitry coupled to one or more memory devices having at least two planes of physical blocks organized into super blocks, with each super block including a physical block from each of the at least two planes, and wherein the control circuitry is configured to; determine defective physical blocks within the planes, the defective physical blocks including original defective blocks as well as grown defective blocks; if none of a plurality of physical blocks at a particular block position are determined to be defective, assign the plurality of physical blocks at the particular block position to a super block; and if one or more of the plurality of physical blocks at the particular block position number are determined to be defective; assign the one or more physical blocks at the particular block position that were not determined to be defective to a super block; and assign a respective replacement physical block to a super block for each of the one or more of the plurality of physical blocks at the particular block position that were determined to be defective;
wherein the respective replacement physical block is selected from an assigned number of physical blocks within a respective one of the planes that includes a respective physical block that was determined to be defective.- View Dependent Claims (30)
Specification