Antiblooming imaging apparatus, systems, and methods

• US 8,097,908 B2
• Filed: 03/08/2010
• Issued: 01/17/2012
• Est. Priority Date: 11/28/2006
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Xu, Chen, Karasev, Igor, Agranov, Gennadiy
• Primary Examiner(s): Quach, Tuan N.
• Application Number:
  US12/719,597
• Publication Number:
  US 20100163933A1
• Time in Patent Office: 680 Days
• Field of Search: 257/230, 257291-294, 257/432, 257/E21.139, 257/E27.133, 257/E27.139
• US Class Current: 257/292
• CPC Class Codes: H04N 25/623 by evacuation via the output or reset lines
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct charge carriers away from the photosensitive region during an integration time.

Claims

1. An imager comprising:

a filter formed to transmit light within a predetermined wavelength range; and

a pixel matrix configured to receive the light through the filter, the pixel matrix comprising an N×

M array of selectable photosensitive elements, wherein the N×

M array comprises a pinned photodiode structure formed in a region of photosensitive semiconductor material, and an n-type conductive region positioned between a charge carrier sink and the pinned photodiode structure, and wherein a volume between the n-type conductive region and the pinned photodiode structure is configured to prevent charge carriers from entering the photosensitive semiconductor material during an integration time.

2. The imager of claim 1, wherein the filter is attached to a substrate supporting the pixel matrix.

3. The imager of claim 1, wherein the region of photosensitive semiconductor material is configured to receive light passing through an antireflective material.

4. The imager of claim 3, wherein the antireflective material is configured as a layer attached to at least one of the filter, the substrate, or the region of photosensitive material.

5. The imager of claim 1, wherein the filter is configured to pass light having an energy above a band gap energy of the region of photosensitive semiconductor material.

6. The imager of claim 1, wherein the filter is coupled to receive light from at least one lens.

7. The imager of claim 1, wherein the region of photosensitive semiconductor material is configured to generate carriers at a specified rate based on the predetermined wavelength.

8. The imager of claim 1, wherein the filter is a substrate layer supporting the pixel matrix.

9. The imager of claim 1, wherein the volume between the n-type conductive region and the photosensitive semiconductor material includes a portion configured to block charge carriers using a dopant atom profile.

10. The imager of claim 1, wherein a region between the n-type conductive region and the charge carrier sink form a barrier including in-band electronic states.

11. An imager comprising:

a filter formed to transmit light within a predetermined wavelength range; and

a pixel matrix configured to receive the light through the filter, the pixel matrix comprising an N×

M array of selectable photosensitive elements, wherein the N×

M array comprises a photosensitive region, a diffusion region, and a charge carrier sink such that a volume between the photosensitive region and the charge carrier sink is configured to prevent charge carriers from entering the photosensitive region during an integration time.

12. The imager of claim 11, wherein the imager includes a transfer gate coupled to a transfer gate region, the transfer gate region directly adjacent to the photosensitive region, the transfer gate region having a doping profile such that a potential well of the photosensitive region has a higher potential barrier generated at an interface with the transfer gate region than a potential barrier generated at an end of the potential well opposite the transfer gate region.

13. The imager of claim 11, wherein the imager includes:

a transfer gate coupled to a transfer gate region, the transfer gate region directly adjacent to the photosensitive region, the transfer gate region having a doping profile; and

a reset gate region, the reset gate region directly adjacent to the diffusion region and directly adjacent to the charge carrier sink, the reset gate region having a doping profile, the doping profiles of the transfer gate region and the reset gate region selected to effect potential barriers, associated with the transfer gate region and the reset gate region, to direct charge carriers away from a potential well of the photosensitive region during the integration time.

14. The imager of claim 11, wherein the photosensitive region is coupled to the diffusion region by a transfer gate region, and the diffusion region is coupled to the charge carrier sink by a reset gate region.

15. The imager of claim 11, wherein the imager includes circuitry to provide potentials to direct charge carriers in the diffusion region to the charge carrier sink and to direct non-photogenerated charge carriers away from the photosensitive region during the integration time.

16. An imager comprising:

a filter formed to transmit light within a predetermined wavelength range; and

a pixel matrix configured to receive the light through the filter, the pixel matrix comprising an N×

M array of selectable photosensitive elements, wherein the N×

M array comprises;

a photosensitive region below a photogate;

a transfer gate region coupled to the photosensitive region;

a diffusion region coupled to the transfer gate region;

a reset gate region coupled to the diffusion region; and

a charge carrier sink coupled to the reset gate region such that a volume between the photosensitive region and the charge carrier sink is configured to prevent charge carriers from entering the photosensitive region during an integration time.

17. The imager of claim 16, wherein the photogate includes a transparent photogate.

18. The imager of claim 16, wherein the filter is arranged on a substrate in which the photosensitive region is disposed, the filter arranged on a surface of the substrate opposite the photosensitive region to provide backside illumination.

19. The imager of claim 16, wherein the reset gate region includes in-band electronic states.

20. The imager of claim 16, wherein the transfer gate region has a doping profile and the reset gate region has a doping profile, the doping profiles of the transfer gate region and the reset gate region selected to effect potential barriers, associated with the transfer gate region and the reset gate region, to direct charge carriers away from a potential well of the photosensitive region during the integration time.