Silicon carbide semiconductor device

• US 8,097,917 B2
• Filed: 07/09/2009
• Issued: 01/17/2012
• Est. Priority Date: 11/08/2004
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Kumar, Malhan Rajesh, Takeuchi, Yuichi
• Primary Examiner(s): Kim, Jay C
• Application Number:
  US12/458,377
• Publication Number:
  US 20090272983A1
• Time in Patent Office: 922 Days
• Field of Search: 257/77, 257/330, 257/332, 257/E21.382, 257/E29.066, 257/E29.197, 257/E29.198, 257/E29.2, 257/E29.201, 257/E29.257, 257/E29.26, 257/E29.262
• US Class Current: 257/332
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7391 Gated diode structures
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7828 without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor

Abstract

A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor layers to reach the first semiconductor layer; a channel layer on a sidewall and a bottom of the trench; an oxide film on the channel layer; a gate electrode on the oxide film; a first electrode connecting to the third semiconductor layer; and a second electrode connecting to the silicon carbide substrate. A position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film.

Claims

1. A silicon carbide semiconductor device comprising:

a semiconductor substrate including a silicon carbide substrate having a first conductive type or a second conductive type, a first semiconductor layer made of the first conductive type silicon carbide and having an impurity concentration lower than an impurity concentration of the silicon carbide substrate, a second semiconductor layer made of a second conductive type silicon carbide, and a third semiconductor layer made of the first conductive type silicon carbide, which are stacked in this order from the semiconductor substrate to the third semiconductor layer;

a trench disposed in a cell region of the semiconductor substrate and penetrating the second and the third semiconductor layers to contact the first semiconductor layer;

a channel layer having the first conductive type and disposed on a sidewall and a bottom of the trench;

an oxide film disposed on the channel layer in the trench and including a part for functioning as a gate oxide film;

a gate electrode disposed on a surface of the oxide film in the trench;

a first electrode electrically connecting to the third semiconductor layer; and

a second electrode electrically connecting to the silicon carbide substrate, wherein any position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film in the trench,

the silicon carbide substrate has the first conductive type,

a plurality of second trenches are disposed in the silicon carbide substrate, each second trench being disposed from a backside of the silicon carbide substrate to the first semiconductor layer,

each of the second trenches is embedded with an impurity layer having the second conductive type, and

the second electrode contacts the silicon carbide substrate and the impurity layer in each of the second trenches, and

wherein each of the second trenches penetrates the silicon carbide substrate so that the impurity layer in each of the second trenches contacts the first semiconductor layer.

2. The silicon carbide semiconductor device of claim 1, wherein the channel layer covers an entirety of the bottom of the trench.

3. The silicon carbide semiconductor device of claim 1, wherein a thickness of the channel layer on the bottom of the trench is greater than a thickness of the channel layer on the sidewall of the trench.

4. The silicon carbide semiconductor device of claim 1, wherein the gate electrode comprises a single electrode disposed on the surface of the oxide film in the trench.

5. The silicon carbide semiconductor device of claim 1, wherein the gate electrode comprises the only electrode disposed in the trench.