Vertically integrated phased array

• US 8,098,198 B2
• Filed: 03/04/2011
• Issued: 01/17/2012
• Est. Priority Date: 05/01/2008
• Status: Expired due to Fees

• Current Assignee: EMAG Technologies, Inc.
• Original Assignee: EMAG Technologies, Inc.
• Inventors: Thiesen, Jack H., Brakora, Karl F.
• Primary Examiner(s): Tarcza, Thomas
• Assistant Examiner(s): Mull, Fred H
• Application Number:
  US13/040,817
• Publication Number:
  US 20110148707A1
• Time in Patent Office: 319 Days
• Field of Search: 342372-373, 343/700.MS
• US Class Current: 342/372
• CPC Class Codes: H01Q 21/065 Patch antenna array
• CPC Class Codes: H01Q 3/2605 Array of radiating elements provided with a feedback control over the element weights, e.g. adaptive arrays

Abstract

A vertically integrated electronically steered phased array that employs beamsteering using a programmable phase locked loop including a local oscillator. The local oscillator provides an oscillator signal that is converted to an RF signal that can be either up-converted for a transmit operation or down-converted for a receive operation. The relative off-set between independently generated local oscillator signals forms the basis of the off-set phase required for a phased array. The absolute measure of off-set phase is referenced to a globally distributed clock signal that aligns the zero degree phase shift of the oscillator.

Claims

1. A vertically integrated phased array comprising:

a plurality of receive channels including;

a plurality of receive nodes providing a receive distribution network including a top layer and a bottom layer, said top layer including a local oscillator that controls a phased locked loop at the plurality of receive nodes in the top layer of the receive distribution network, and the phased locked loop at the nodes of the top layer each control a programmable phased locked loop in the bottom layer for separate receive channels.

2. The phased array according to claim 1 wherein the phased array is configured as a stack of layers including an antenna array layer having a plurality of antennas, an interconnect layer including the plurality of receive nodes and at least one packaging layer having a plurality of digital components.

3. The phased array according to claim 2 wherein the stack of layers includes a stack of printed circuit board layers that are bonded together.

4. The phased array according to claim 2 wherein the plurality of antennas are patch antennas.

5. The phased array according to claim 2 wherein the plurality of antennas are non-planar antennas.

6. The phased array according to claim 2 wherein the plurality of antennas are formed on a substrate that includes cavities formed behind the antennas.

7. The phased array according to claim 1 wherein the programmable phase locked loops in the bottom layer each include a plurality of local oscillators for providing wide bandwidth.

8. The phased array according to claim 1 wherein the programmable phase locked loops receive control signals that set the relative phase of the local oscillators in the programmable phase locked loops so as to establish a phase off-set of the local oscillator signal with the edge of a clock signal.

9. The phased array according to claim 1 wherein the phased array has a chip-level integrated circuit configuration.

10. The phased array according to claim 1 wherein the phased array has a printed circuit board configuration.

11. The phased array according to claim 1 wherein the top and bottom layers are a stack of printed circuit board layers that are bonded together.

12. The phased array according to claim 1 wherein each of the plurality of receive channels includes an antenna circuit having an antenna element positioned on one side of a substrate and RFICs positioned on an opposite side of the substrate and being electrically coupled to the antenna element, said antenna circuit further including connectors that are electrically coupled to circuit components on a control layer.

13. The phased array according to claim 12 wherein the RFICs are positioned within cavities formed in the one side of the substrate.

14. A vertically integrated phased array comprising:

a plurality of stacked layers including;

an antenna layer having a plurality of antennas;

an interconnect layer having a plurality of receive components; and

at least one packaging layer having a plurality of digital components, wherein the plurality of receive components include a plurality of receive programmable phased locked loops each including a plurality of local oscillators providing a wideband local oscillator signal having a controlled phase and a plurality of programmable phased locked loops each including a plurality of local oscillators providing a wideband local oscillator signal having a controlled phase, wherein the receive programmable phased locked loops receive control data that sets the relative phase of the local oscillator signals to control the phase of receive signals.

15. The phased array according to claim 14 wherein the stacked layers include a stack of printed circuit board layers that are bonded together.

16. The phased array according to claim 14 wherein the programmable phase locked loops each include a plurality of local oscillators for providing wide bandwidth.

17. A vertically integrated phased array comprising:

a plurality of receive channels; and

a plurality of receive components and receive nodes, said receive components and nodes providing a receive distribution network including a top layer and a bottom layer, said top layer including a local oscillator and a plurality of top layer phase locked loops at the receive nodes, said bottom layer including a plurality of programmable phase locked loops, said local oscillator controlling the top layer phased locked loops at the plurality of receive nodes in the top layer of the receive distribution network, and each phased locked loop at the receive nodes controlling one of the programmable phased locked loops in the bottom layer for separate receive channels.

18. The phased array according to claim 17 wherein the phased array is configured as a stack of layers including an antenna array layer having a plurality of antennas, an interconnect layer including the plurality of receive nodes and at least one packaging layer having a plurality of digital components.

19. The phased array according to claim 17 wherein the programmable phase locked loops each include a plurality of local oscillators for providing wide bandwidth.

20. The phased array according to claim 17 wherein the programmable phase locked loops receive control signals that set the relative phase of the local oscillators in the programmable phase locked loops so as to establish a phase off-set of the local oscillator signal with the edge of the clock signal.