Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device

• US 8,101,523 B2
• Filed: 11/05/2010
• Issued: 01/24/2012
• Est. Priority Date: 02/27/2008
• Status: Expired due to Fees

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Ishibashi, Keiji, Mikami, Hidenori, Matsumoto, Naoki
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): NOVACEK, CHRISTY L
• Application Number:
  US12/940,733
• Publication Number:
  US 20110049679A1
• Time in Patent Office: 445 Days
• Field of Search: 438/690, 438/619, 438/928, 438/959, 438/977, 257/E21.603
• US Class Current: 438/690
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 33/00 After-treatment of single crystals or homogeneous polycrystalline material with defined structure C30B31/00 takes precedence
• CPC Class Codes: H01L 21/02021 Edge treatment, chamfering
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 33/0075 comprising nitride compounds
• CPC Class Codes: Y10S 438/928 Front and rear surface processing
• CPC Class Codes: Y10S 438/959 Mechanical polishing of wafer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

Claims

1. A method of producing nitride semiconductor devices comprising the steps of:

preparing a nitride semiconductor wafer which has a chamfered edge, a 0.5 μ

m-10 μ

m thick edge process-induced degradation layer with a deformed lattice structure remaining on the chamfered edge and a mirror-flat top surface;

growing epitaxially nitride films on the nitride semiconductor wafer;

forming electrodes; and

dividing the wafer into device chips.

2. The method as claimed in claim 1, wherein edge roughness of the substrate of the nitride semiconductor wafer is Ra0.07 μ

m to Ra3 μ

m.

3. The method as claimed in claim 1, wherein edge oxygen concentration of the substrate of the nitride semiconductor wafer is 3 at % to 20 at %.

4. The method as claimed in claim 1, wherein edge metal concentration of the substrate of the nitride semiconductor wafer is 0.1 at % to 5 at %.

5. A method of producing nitride semiconductor devices comprising the steps of:

preparing a nitride semiconductor wafer having a chamfered edge formed by a rubber-bonding whetstone, a 1 μ

m-3 μ

m thick edge process-induced degradation layer with a deformed lattice structure remaining on the chamfered edge and a mirror-flat top surface;

growing epitaxially nitride films on the nitride semiconductor wafer;

forming electrodes; and

dividing the wafer into device chips.