Device selection circuitry constructed with nanotube ribbon technology

• US 8,101,976 B2
• Filed: 09/11/2007
• Issued: 01/24/2012
• Est. Priority Date: 07/25/2001
• Status: Expired due to Fees

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Segal, Brent M., Brock, Darren K., Rueckes, Thomas
• Primary Examiner(s): Richards, N Drew
• Assistant Examiner(s): Dulka, John P
• Application Number:
  US11/853,550
• Publication Number:
  US 20080169488A1
• Time in Patent Office: 1,596 Days
• Field of Search: 257/209, 257/E27.07, 257/208, 257/317, 257/320, 257/331, 257/343, 977/708, 977/709, 977/721, 977/724, 977/750, 977/755, 977/933, 977/938, 977/765, 438/52, 438/283, 438/668, 365/129, 365/151, 365/153
• US Class Current: 257/209
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 13/025 using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
• CPC Class Codes: G11C 2213/77 Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
• CPC Class Codes: G11C 2213/81 Array wherein the array conductors, e.g. word lines, bit lines, are made of nanowires
• CPC Class Codes: G11C 23/00 Digital stores characterised by movement of mechanical parts to effect storage, e.g. using balls; Storage elements therefor
• CPC Class Codes: H01H 1/0094 Switches making use of nanoelectromechanical systems [NEMS]
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H10B 99/10 Memory cells having a cross-point geometry
• CPC Class Codes: Y10S 977/734 Fullerenes, i.e. graphene-based structures, such as nanohorns, nanococoons, nanoscrolls or fullerene-like structures, e.g. WS2 or MoS2 chalcogenide nanotubes, planar C3N4, etc.
• CPC Class Codes: Y10S 977/742 Carbon nanotubes, CNTs
• CPC Class Codes: Y10S 977/765 with specified cross-sectional profile, e.g. belt-shaped
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. The decoder circuit is constructed of crossbar junctions at least one element of each junction being a nanotube or a nanotube ribbon.

Claims

1. A nanotube switch, comprising:

a nanotube ribbon comprising a plurality of nanotubes and having upper and lower major surfaces wherein the upper and lower major surfaces are substantially parallel;

a first conductive element in contact with at least a portion of the lower major surface of the nanotube ribbon; and

a second conductive element in contact with at least a portion of the upper major surface of the nanotube ribbon,

the nanotube ribbon switching between first and second states in response to electrical stimulus at the first and second conductive elements.

2. The nanotube switch of claim 1, wherein the nanotube ribbon provides a plurality of electrical pathways between the first and second conductive elements in the first state, and wherein the nanotube ribbon provides substantially no electrical pathways between the first and second conductive elements in the second state.

3. The nanotube switch of claim 1, wherein the nanotube ribbon provides a number of electrical pathways between the first and second conductive elements that is based on the electrical stimulus.

4. The nanotube switch of claim 1, wherein the nanotube ribbon is permanently pinned to at least one of the first and second conductive elements.

5. The nanotube switch of claim 1, wherein the nanotube ribbon is in non-volatile contact with both of the first and second conductive elements.

6. The nanotube switch of claim 1, wherein van der Waals forces pin the nanotube ribbon to at least one of the first and second conductive elements.

7. The nanotube switch of claim 1, wherein the nanotube ribbon is in spaced relation to the second conductive element in the second state.

8. The nanotube switch of claim 1, wherein the nanotube ribbon switches between the first and second states in response to electrical stimulus at only the first and second conductive elements.

9. The nanotube switch of claim 1, wherein the electrical stimulus comprises a current and a voltage.

10. The nanotube switch of claim 1, wherein the nanotube ribbon has a width, and wherein at least one of the first and second conductive elements has a width no greater than the width of the nanotube ribbon.

11. The nanotube switch of claim 1, wherein at least one of the first and second conductive elements has a substantially rectangular cross section.

12. The nanotube switch of claim 1, wherein at least one of the first and second conductive elements comprises metal.

13. The nanotube switch of claim 1, wherein at least one of the first and second conductive elements comprises doped silicon.

14. The nanotube switch of claim 1, wherein at least one of the first and second conductive elements has multiple surfaces in contact with an insulator.

15. The nanotube switch of claim 1, wherein at least one of the nanotube ribbon and the first and second conductive elements has at least one lateral dimension smaller than about 180 nm.

16. The nanotube switch of claim 1, wherein the nanotube ribbon comprises a multilayer nanotube fabric.

17. The nanotube switch of claim 1, wherein the nanotube ribbon comprises a monolayer nanotube fabric.

18. The nanotube switch of claim 1, wherein a portion of at least one of the upper and lower surfaces of the nanotube ribbon contacts an insulator.

19. The nanotube switch of claim 1, wherein the first and second conductive elements are in electrical communication with buffering and control logic.

20. The nanotube switch of claim 19, wherein the buffering and control logic are integrated with the nanotube switch on a single chipset.

21. The nanotube switch of claim 1, further comprising hermetic packaging.