Differential amplifier circuit and electric charge control apparatus using differential amplifier circuit

• US 8,102,156 B2
• Filed: 09/06/2007
• Issued: 01/24/2012
• Est. Priority Date: 09/08/2006
• Status: Expired due to Fees

• Current Assignee: Ricoh Company Limited
• Original Assignee: Ricoh Company Limited
• Inventors: Nodo, Ippei
• Primary Examiner(s): Tso, Edward
• Assistant Examiner(s): TORRES RUIZ, JOHALI ALEJANDRA
• Application Number:
  US11/896,898
• Publication Number:
  US 20080061745A1
• Time in Patent Office: 1,601 Days
• Field of Search: 320/162
• US Class Current: 320/162
• CPC Class Codes: H03F 2203/45048 Calibrating and standardising a dif amp
• CPC Class Codes: H03F 2203/45101 Control of the DC level being present
• CPC Class Codes: H03F 2203/45244 the differential amplifier contains one or more explicit bias circuits, e.g. to bias the tail current sources, to bias the load transistors
• CPC Class Codes: H03F 2203/45354 the AAC comprising offset means
• CPC Class Codes: H03F 2203/45372 the AAC comprising one or more potentiometers
• CPC Class Codes: H03F 2203/45391 the AAC comprising potentiometers in the source circuit of the AAC before the common source coupling
• CPC Class Codes: H03F 2203/45392 the AAC comprising resistors in the source circuit of the AAC before the common source coupling
• CPC Class Codes: H03F 2203/45482 the CSC comprising offset means
• CPC Class Codes: H03F 2203/45686 the LC comprising one or more potentiometers, which are not shunting potentiometers
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45771 using switching means
• CPC Class Codes: H03F 3/70 Charge amplifiers

Abstract

A differential amplifier circuit comprises a first input transistor including a control electrode serving as a non-inversion input terminal and a second input transistor including a control electrode serving as an inversion input terminal. These first and second input transistors constitute a difference pair. A bias current generation circuit section is provided to generate a bias current flowing to the first and second input transistors. An offset adjustment circuit section is provided to adjust an input offset voltage appearing at these input terminals. The offset adjustment circuit section has an adjustment resistance formed from a first variable resistance inserted into a first current route connecting to the first input transistor and a second variable resistance inserted into a second current route connecting to the second input transistor. The bias current generation circuit section changes the bias current in accordance with a change in a value of the adjustment resistance.

Claims

1. A differential amplifier circuit, comprising:

a first input transistor including a control electrode serving as a non-inversion input terminal;

a second input transistor including a control electrode serving as an inversion input terminal, said second input transistor constituting a difference pair with the first input transistor;

a bias current generation circuit section configured to generate a bias current flowing to the first and second input transistors; and

an offset adjustment circuit section configured to adjust an input offset voltage appearing at said input terminals, said offset adjustment circuit section having an adjustment resistance formed from a first variable resistance inserted into a first current route connecting to the first input transistor, and a second variable resistance inserted into a second current route connecting to the second input transistor;

wherein said bias current generation circuit section changes the bias current in accordance with a change in a value of the adjustment resistance and said bias current generation circuit section comprises;

a bias current generation use resistance configured to change a value of its own resistance in proportion to a change in a value of the adjustment resistance;

a current control circuit configured to control a current flowing to the bias current generation use resistance so that a voltage drop in the bias current generation use resistance becomes a prescribed amount; and

a proportional current generation circuit configured to generate a current as a bias current in proportion to the current flowing from the current control circuit to the bias current generation use resistance.

2. The differential amplifier circuit as claimed in claim 1, wherein said first variable resistance includes at least two first resistances serially connected to each other, and at least two first trimming fuses correspondingly connected in parallel to the first resistances;

and wherein said value of the first variable resistance is changed by selectively cutting said at least two first trimming fuses.

3. The differential amplifier circuit as claimed in claim 1, wherein said second variable resistance includes at least two second resistances serially connected to each other, and at least two second trimming fuses correspondingly connected in parallel to the at least two second resistances;

wherein said value of the second variable resistance is changed by selectively cutting said at least two second trimming fuses.

4. The differential amplifier circuit as claimed in claim 1, wherein said proportional current generation circuit utilizes the current flowing from the current control circuit to the bias current generation use resistance as a bias current.

5. The differential amplifier circuit as claimed in claim 1, wherein said bias current generation use resistance is made of the same material as the adjustment resistance and is manufactured in the same process.

6. The differential amplifier circuit as claimed in claim 1, wherein values of said resistances of the adjustment resistance are calculated by K×

2ⁿ, wherein K represents the minimum resistance value and n represents integral number.

7. An electric charge control apparatus, comprising:

an electric charge current detection circuit configured to detect an electric charge current supplied to a secondary battery through an electric charge current detection use resistance by converting a both end voltage of the electric charge current detection use resistance into a voltage with reference to a ground using a subtraction circuit having a differential amplifier circuit;

wherein said secondary battery is electrically charged by controlling the electric charge current based on an output signal outputted from the electric charge current detection circuit, and

wherein said differential amplifier circuit including;

a first input transistor including a control electrode serving as a non-inversion input terminal;

a second input transistor including a control electrode serving as an inversion input terminal, said second input transistor constituting a difference pair with the first input transistor;

a bias current generation circuit section configured to generate a bias current flowing to the first and second input transistors; and

an offset adjustment circuit section configured to adjust an input offset voltage appearing at said input terminals, said offset adjustment circuit section having an adjustment resistance formed from a first variable resistance inserted into a first current route connecting to the first input transistor, and a second variable resistance inserted into a second current route connecting to the second input transistor;

wherein said bias current generation circuit section changes the bias current in accordance with a change in a value of the adjustment resistance and said bias current generation circuit section comprises;

a bias current generation use resistance configured to change a value of its own resistance in proportion to a change in a value of the adjustment resistance;

a current control circuit configured to control a current flowing to the bias current generation use resistance so that a voltage drop in the bias current generation use resistance becomes a prescribed amount; and

a proportional current generation circuit configured to generate a current as a bias current in proportion to the current flowing from the current control circuit to the bias current generation use resistance.

8. The electric charge control apparatus as claimed in claim 7, wherein said first variable resistance includes at least two first resistances serially connected to each other, and at least two first trimming fuses correspondingly connected in parallel to the first resistances;

and wherein said value of the first variable resistance is changed by selectively cutting said at least two first trimming fuses.

9. The electric charge control apparatus as claimed in claim 7, wherein said second variable resistance includes at least two second resistances serially connected to each other, and at least two second trimming fuses correspondingly connected in parallel to the at least two second resistances;

wherein said value of the second variable resistance is changed by selectively cutting said at least two second trimming fuses.

10. The electric charge control apparatus as claimed in claim 7, wherein said proportional current generation circuit utilizes the current flowing from the current control circuit to the bias current generation use resistance as a bias current.

11. The electric charge control apparatus as claimed in any one of claims 7 and 10, wherein said bias current generation use resistance is made of the same material as the adjustment resistance and is manufactured in the same process.

12. The electric charge control apparatus as claimed in claim 7, wherein values of said resistances of the adjustment resistance are calculated by K×

2ⁿ, wherein K represents the minimum resistance value and n represents integral number.

13. A differential amplifier circuit, comprising:

an offset adjustment circuit configured to adjust an input offset voltage across a difference pair formed by a non-inversion input transistor and an inversion input transistor by adjusting an adjustment resistance between the transistors; and

a bias current generation circuit configured to generate a bias current that changes in accordance with a change in a value of the adjustment resistance flowing to the non-inversion and inversion input transistors, said bias current generation circuit comprising;

a bias current generation use resistance configured to change a value of its own resistance in proportion to a change in a value of the adjustment resistance;

a current control circuit configured to control a current flowing to the bias current generation use resistance so that a voltage drop in the bias current generation use resistance becomes a prescribed amount; and

a proportional current generation circuit configured to generate a current as a bias current in proportion to the current flowing from the current control circuit to the bias current generation use resistance.

14. The differential amplifier circuit of claim 13, wherein the adjustment resistance is formed from a first variable resistance in a first current route coupled to the non-inversion input transistor and a second variable resistance in a second current route coupled to the inversion input transistor.

15. The differential amplifier circuit as claimed in claim 14, wherein said first variable resistance includes at least two first resistances serially connected to each other, and at least two first trimming fuses correspondingly connected in parallel to the first resistances;

and wherein said value of the first variable resistance is changed by selectively cutting said at least two first trimming fuses.

16. The differential amplifier circuit as claimed in claim 14, wherein said second variable resistance includes at least two second resistances serially connected to each other, and at least two second trimming fuses correspondingly connected in parallel to the at least two second resistances;

wherein said value of the second variable resistance is changed by selectively cutting said at least two second trimming fuses.

17. The differential amplifier circuit as claimed in claim 13, wherein said proportional current generation circuit utilizes the current flowing from the current control circuit to the bias current generation use resistance as a bias current.

18. The differential amplifier circuit as claimed in claim 13, wherein said bias current generation use resistance is made of the same material as the adjustment resistance and is manufactured in the same process.

19. The differential amplifier circuit as claimed in claim 13, wherein values of said resistances of the adjustment resistance are calculated by K×

2ⁿ, wherein K represents the minimum resistance value and n represents an integral number.