Method and system for calibrating a plurality of modules in a communication system

• US 8,102,953 B2
• Filed: 12/29/2006
• Issued: 01/24/2012
• Est. Priority Date: 12/06/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Roufoogaran, Razieh, Behzad, Arya, Li, Qiang
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US11/618,721
• Publication Number:
  US 20080139143A1
• Time in Patent Office: 1,852 Days
• Field of Search: 375/319, 375/324, 375/326, 375/340, 375/344, 375/345, 375/349, 455/135, 455/136, 455/138, 455/139, 455/141, 455/146, 455/147, 455/179.1, 455/180.1, 455/180.3, 455/182.2, 455/192.2, 455/193.2, 455/209, 455/234.1, 455/245.2, 455/251.1, 455/262, 455/264, 455/266, 455/285
• US Class Current: 375/345
• CPC Class Codes: H03G 1/0035 using continuously variable impedance elements
• CPC Class Codes: H03G 3/30 in amplifiers having semiconductor devices
• CPC Class Codes: H04B 1/0082 with a common local oscillator for more than one band

Abstract

A method and system for calibrating a plurality of modules in a communication system is provided. The method may include selecting a plurality of modules with at least one output signal and calibrating an amplitude of each selected module to be within a specified range if the amplitude is out of the specified range via a gain control processing circuit of the selected module, wherein the plurality of modules may be calibrated in an order starting with a first module located at an input of a signal path and ending with a module located at an output of the signal path. The DC component and amplitude of the envelope of the output signal may be detected by circuitry within the selected module. Muxes may be utilized to route the DC component and amplitude of the envelope to a feedback control processing circuit.

Claims

1. A method for processing signals in a communication system, the method comprising:

selecting at least one of a plurality of modules that enable generation of at least one output signal along a signal path; and

calibrating an amplitude of said selected at least one of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, via a gain control processing circuit of said selected at least one of said plurality of modules, wherein said plurality of modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path.

2. The method according to claim 1, comprising detecting a DC component of an envelope of said at least one output signal.

3. The method according to claim 1, comprising detecting an amplitude of an envelope of said at least one output signal.

4. The method according to claim 1, comprising detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected at least one of said plurality of modules.

5. The method according to claim 4, comprising routing said one or both of:

said DC component and/or said amplitude of said envelope of said at least one output signal via at least one multiplexer to a feedback control processing circuit.

6. The method according to claim 5, comprising communicating an n-bit code word from said feedback control processing circuit to said gain control processing circuit of said selected at least one of said plurality of modules, wherein n is an integer greater than or equal one.

7. The method according to claim 1, wherein said selected at least one of said plurality of modules comprises one or more of:

a mixer, a VCO, and/or a buffer.

8. The method according to claim 1, wherein said signal path comprises one or both of:

an in-phase processing path and/or a quadrature processing path.

9. A non-transitory machine-readable storage medium having stored thereon, a computer program having at least one code section for processing signals in a communication system, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

selecting at least one of a plurality of modules that enable generation of at least one output signal along a signal path; and

calibrating an amplitude of said selected at least one of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, via a gain control processing circuit of said selected at least one of said plurality of modules, wherein said plurality of modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path.

10. The machine-readable storage medium according to claim 9, wherein said at least one code section comprises code that enables detecting a DC component of an envelope of said at least one output signal.

11. The machine-readable storage medium according to claim 9, wherein said at least one code section comprises code that enables detecting an amplitude of an envelope of said at least one output signal.

12. The machine-readable storage medium according to claim 9, wherein said at least one code section comprises code that enables detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected at least one of said plurality of modules.

13. The machine-readable storage medium according to claim 12, wherein said at least one code section comprises code that enables routing said one or both of:

said DC component and/or said amplitude of said envelope of said at least one output signal via at least one multiplexer to a feedback control processing circuit.

14. The machine-readable storage medium according to claim 13, wherein said at least one code section comprises code that enables communicating an n-bit code word from said feedback control processing circuit to said gain control processing circuit of said selected at least one of said plurality of modules, wherein n is an integer greater than or equal one.

15. The machine-readable storage medium according to claim 9, wherein said selected at least one of said plurality of modules comprises one or more of:

a mixer, a VCO, and/or a buffer.

16. The machine-readable storage medium according to claim 9, wherein said signal path comprises one or both of:

an in-phase processing path and/or a quadrature processing path.

17. A system for processing signals in a communication system, the system comprising:

a plurality of circuits that enables selecting at least one of a plurality of modules that enable generation of at least one output signal along a signal path; and

said plurality of circuits enables calibrating an amplitude of said selected at least one of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, said plurality of circuits comprising a gain control processing circuit of said selected at least one of said plurality of modules, wherein said plurality of modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path.

18. The system according to claim 17, wherein said plurality of circuits enables detecting a DC component of an envelope of said at least one output signal.

19. The system according to claim 17, wherein said plurality of circuits enables detecting an amplitude of an envelope of said at least one output signal.

20. The system according to claim 17, wherein said plurality of circuits enables detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected at least one of said plurality of modules.

21. The system according to claim 20, wherein said plurality of circuits enables routing said one or both of:

said DC component and/or said amplitude of said envelope of said at least one output signal via at least one multiplexer to a feedback control processing circuit.

22. The system according to claim 21, said plurality of circuits enables communicating an n-bit code word from said feedback control processing circuit to said gain control processing circuit of said selected at least one of said plurality of modules of said selected plurality of modules, wherein n is an integer greater than or equal one.

23. The system according to claim 17, wherein said selected at least one of said plurality of modules comprises one or more of:

a mixer, a VCO, and/or a buffer.

24. The system according to claim 17, wherein said signal path comprises one or both of:

an in-phase processing path and/or a quadrature processing path.

25. A method for processing signals in a communication system, the method comprising:

selecting one or more modules of a plurality of modules that enable generation of at least one output signal along a signal path; and

calibrating an amplitude of said selected one or more modules of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, via a gain control processing circuit of said selected one or more modules, wherein said selected one or more modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path when more than one module is selected.

26. The method according to claim 25, comprising detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected one or more modules.

27. A non-transitory computer-readable storage medium having stored thereon, a computer program having at least one code section for processing signals in a communication system, the at least one code section being executable by a computer for causing the computer to perform steps comprising:

selecting one or more modules of a plurality of modules that enable generation of at least one output signal along a signal path; and

calibrating an amplitude of said selected one or more modules of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, via a gain control processing circuit of said selected one or more modules, wherein said selected one or more modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path when more than one module is selected.

28. The computer-readable storage medium according to claim 27, wherein said at least one code section comprises code that enables detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected one or more modules.

29. A system for processing signals in a communication system, the system comprising:

a plurality of circuits that enables selecting one or more modules of a plurality of modules that enable generation of at least one output signal along a signal path; and

said plurality of circuits enables calibrating an amplitude of said selected one or more modules of said plurality of modules to be, during said generation of said at least one output signal, within a specified frequency range if said amplitude is out of said specified frequency range, via a gain control processing circuit of said selected one or more modules, wherein said selected one or more modules is calibrated in an order starting with a first module located at an input of said signal path and ending with a module located at an output of said signal path when more than one module is selected.

30. The system according to claim 29, wherein said plurality of circuits enables detecting one or both of:

a DC component and/or an amplitude of an envelope of said at least one output signal within said selected one or more modules.