High-isolation transmit/receive switch on CMOS for millimeter-wave applications

• US 8,103,221 B2
• Filed: 05/30/2008
• Issued: 01/24/2012
• Est. Priority Date: 05/30/2008
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc., AMD Far East Ltd. (Advanced Micro Devices, Inc.)
• Original Assignee: National ICT Australia Limited
• Inventors: Ta, Chien M., Skafidas, Stan, Evans, Rob
• Primary Examiner(s): Tran, Tuan A
• Application Number:
  US12/130,869
• Publication Number:
  US 20090298443A1
• Time in Patent Office: 1,334 Days
• Field of Search: 455 73- 84, 333/101, 333103-104, 333/110, 333115-117, 333/124, 333126-127, 333/132, 333/135, 327/308, 327/365
• US Class Current: 455/81
• CPC Class Codes: H01P 1/15 by semiconductor devices
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

A CMOS monolithic transmit/receive switch comprises a single pole double throw switch (SPDT) module operable to selectively connect an antenna port to either a transmit port or to a receive port. A transmit matching network comprising a first transmission line matches the impedance of the transmit port of the SPDT module to a transmit impedance, and a first shunt transistor is operable to selectively ground a transmitter end of the first transmission line. A receive matching network comprising a second transmission line matches the impedance of the receive port of the SPDT module to a receive impedance, and a second shunt transistor is operable to selectively ground a receiver end of the second transmission line.

Claims

1. A CMOS monolithic transmit/receive (T/R) switch comprising:

a single pole double throw switch (SPDT) module operable to selectively connect an antenna port to either a transmit port or to a receive port;

a transmit matching network comprising a first transmission line matching the impedance of the transmit port of the SPDT module to a transmit impedance, and a first shunt transistor operable to selectively ground a transmitter end of the first transmission line; and

a receive matching network comprising a second transmission line matching the impedance of the receive port of the SPDT module to a receive impedance, and a second shunt transistor operable to selectively ground a receiver end of the second transmission line.

2. The T/R switch of claim 1, further comprising an antenna matching network comprising a third transmission line and a shunt capacitor, to match the impedance of the antenna port of the SPDT module to an antenna impedance.

3. The T/R switch of claim 1, wherein the shunt transistor of the transmitter matching network is controlled by a RxON input of the SPDT core so as to ground the transmitter end of the first transmission line during a receive stage.

4. The T/R switch of claim 1, wherein the shunt transistor of the receiver matching network is controlled by a TxON input of the SPDT core so as to ground the receiver end of the second transmission line during a transmit stage.

5. The T/R switch of claim 1, wherein an operational frequency of the switch comprises 57-66 GHz.

6. The T/R switch of claim 1 wherein the switch is fabricated on a 130 nm process and wherein control voltages controlling the SPDT module and the first and second shunt transistors are 1.2 V and 0 V so as to provide for direct T/R switch control.

7. The T/R switch of claim 1 wherein transistors of the switch are fabricated with a minimum allowable channel length to minimize Ron.

8. The T/R switch of claim 1 further comprising biasing circuitry to bias the source/drain of all transistors to 0 V to minimize Ron.

9. The T/R switch of claim 1 wherein the first and second transmission lines are fabricated with a signal line formed in a top CMOS metal layer and with a ground layer formed in a lowest CMOS metal layer (M1).

11. A fully integrated CMOS millimeter wave transceiver comprising a transmit/receive switch in accordance with claim 1.

10. A method of transmit/receive switching, the method comprising:

using a single pole double throw switch (SPDT) module to selectively connect an antenna port to either a transmit port or to a receive port;

impedance matching a transmitter to the transmit port by connecting a first transmission line between the transmitter and the transmit port;

selectively grounding a transmitter end of the first transmission line, to isolate the transmitter during receive periods;

impedance matching a receiver to the receive port by connecting a second transmission line between the receiver and the receive port; and

selectively grounding a receiver end of the second transmission line, to isolate the receiver during transmit periods.