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Structure for dynamically allocating lanes to a plurality of PCI express connectors

  • US 8,103,993 B2
  • Filed: 06/02/2008
  • Issued: 01/24/2012
  • Est. Priority Date: 05/24/2006
  • Status: Active Grant
First Claim
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1. A design structure for at least one of designing, manufacturing, and testing a design, the design structure embodied by computer-readable program code that is stored in a non-transitory storage medium, which, when the program code is executed, simulates an apparatus for dynamically allocating lanes to a plurality of PCI Express connectors, the apparatus comprising a computer processor and a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions capable of:

  • identifying whether a PCI Express device is installed into each PCI Express connector;

    identifying historic data traffic for each PCI Express device installed into the plurality of PCI Express connectors; and

    assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector including assigning the lanes to each PCI Express connector in dependence upon the historic data traffic.

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