CMOS imager having a nitride dielectric

• US 8,105,858 B2
• Filed: 08/04/2010
• Issued: 01/31/2012
• Est. Priority Date: 10/14/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Rhodes, Howard E.
• Primary Examiner(s): NGUYEN, CUONG QUANG
• Application Number:
  US12/849,838
• Publication Number:
  US 20100297807A1
• Time in Patent Office: 545 Days
• Field of Search: 438 48- 60, 438 70- 76, 438/E31.127, 438/E27.133
• US Class Current: 438/48
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements

Abstract

An imaging device formed as a CMOS semiconductor integrated circuit includes a nitrogen containing insulating material beneath a photogate. The nitrogen containing insulating material, preferably be one of a silicon nitride layer, an ONO layer, a nitrode/oxide layer and an oxide/nitrode layer. The nitrogen containing insulating layer provides an increased capacitance in the photogate region, higher breakdown voltage, a wider dynamic range and an improved signal to noise ratio. The invention also provides a method for fabricating a CMOS imager containing the nitrogen containing insulating layer.

Claims

1. A method for fabricating a sensor cell of a CMOS imager, comprising the steps of:

forming a doped photo-collection region in a semiconductor substrate;

forming a first insulating layer over said substrate;

forming a first conductive layer over said first insulating layer;

removing at least a portion of said first conductive layer to form at least one transistor gate over said substrate;

forming a nitrogen containing second insulating layer distinct from said first insulating layer and in contact with said semiconductor substrate, such that none of said nitrogen containing second insulating layer is located beneath said transistor gate;

forming a second conductive layer atop said nitrogen containing second insulating layer; and

removing any portion of the nitrogen containing second insulating layer not located beneath the second conductive layer.

2. The method according to claim 1, wherein said first insulating layer is a silicon dioxide layer.

3. The method according to claim 1, wherein said first conductive layer is a doped polysilicon layer.

4. The method according to claim 1, wherein said doped polysilicon layer is deposited by chemical vapor deposition.

5. The method according to claim 1, wherein said first conductive layer is removed by etching.

6. The method according to claim 1, wherein said nitrogen containing second insulating layer is a silicon nitride layer.

7. The method according to claim 1, wherein said nitrogen containing second insulating layer is an ONO layer.

8. The method according to claim 1, wherein said nitrogen containing second insulating layer is an NO layer.

9. The method according to claim 1, wherein said nitrogen containing second insulating layer is an ON layer.

10. The method according to claim 8, wherein said silicon nitride layer is deposited by chemical vapor deposition.

11. The method according to claim 1, wherein said second conductive layer is a doped polysilicon layer.

12. The method according to claim 1, wherein said second conductive layer is a transparent or semi-transparent layer.

13. The method according to claim 12, wherein said second conductive layer is selected from the group consisting of indium-tin-oxide, tin oxide, indium oxide and doped hydrogenated amorphous silicon.

14. The method according to claim 11, wherein said second conductive layer of doped polysilicon is deposited by chemical vapor deposition.

15. The method according to claim 14, wherein said second conductive layer of doped polysilicon is patterned by selective etching.

16. The method according to claim 1, wherein said nitrogen containing insulating layer has a thickness of from about 20 to about 500 angstroms.

17. The method according to claim 16, wherein said nitrogen containing insulating layer has a thickness of from about 30 to about 100 angstroms.

18. The method according to claim 1, wherein said first insulating layer has a thickness of from about 20 to about 500 angstroms.

19. The method according to claim 1, wherein said second conductive layer is a doped polysilicon layer coated with a silicide layer.

20. A method for fabricating a sensor cell of a CMOS imager, comprising the steps of:

forming a doped photo-collection region in a semiconductor substrate;

forming a first insulating layer over said substrate;

forming a first conductive layer over said first insulating layer;

removing at least a portion of said first conductive layer adjacent said doped photo-collection region;

forming a nitrogen containing second insulating layer distinct from said first insulating layer and in contact with said semiconductor substrate;

forming a second conductive layer atop said nitrogen containing second insulating layer; and

removing any portion of the nitrogen containing second insulating layer not located beneath the second conductive layer.

21. The method according to claim 20, wherein said first insulating layer is a silicon dioxide layer.

22. The method according to claim 20, wherein said first conductive layer is a doped polysilicon layer.

23. The method according to claim 20, wherein said doped polysilicon layer is deposited by chemical vapor deposition.

24. The method according to claim 20, wherein said first conductive layer is removed by etching.

25. The method according to claim 20, wherein said nitrogen containing second insulating layer is a silicon nitride layer.

26. The method according to claim 20, wherein said nitrogen containing second insulating layer is an ONO layer.

27. The method according to claim 20, wherein said nitrogen containing second insulating layer is an NO layer.

28. The method according to claim 20, wherein said nitrogen containing second insulating layer is an ON layer.

29. The method according to claim 20, wherein said second conductive layer is a doped polysilicon layer.

30. The method according to claim 20, wherein said second conductive layer is a transparent or semi-transparent layer.

31. The method according to claim 30, wherein said second conductive layer is selected from the group consisting of indium-tin-oxide, tin oxide, indium oxide and doped hydrogenated amorphous silicon.

32. The method according to claim 20, wherein said second conductive layer of doped polysilicon is patterned by selective etching.

33. A method for fabricating a sensor cell of a CMOS imager, comprising the steps of:

forming a doped photo-collection region in a semiconductor substrate;

forming a nitrogen containing insulating layer over said doped photo-collection region and in contact with said semiconductor substrate;

forming a photogate atop said nitrogen containing insulating layer; and

removing any portion of the nitrogen containing second insulating layer not located beneath the photogate.

34. The method according to claim 33, wherein said nitrogen containing insulating layer is a silicon nitride layer.

35. The method according to claim 33, wherein said nitrogen containing insulating layer is an ONO layer.

36. The method according to claim 33, wherein said nitrogen containing insulating layer is an NO layer.

37. The method according to claim 33, wherein said nitrogen containing insulating layer is an ON layer.

38. The method according to claim 34, wherein said silicon nitride layer is deposited by C chemical vapor deposition.

39. The method according to claim 35, wherein said ONO layer is deposited by chemical vapor deposition.

40. The method according to claim 33, wherein said nitrogen containing insulating layer has a thickness of from about 20 to about 500 angstroms.

41. The method according to claim 40, wherein said nitrogen containing insulating layer has a thickness of from about 30 to about 100 angstroms.

42. The method according to claim 33, wherein said photogate is formed of a doped polysilicon.

43. The method according to claim 33, wherein said photogate is formed of a transparent or semi-transparent material.

44. The method according to claim 43, wherein said transparent or semi-transparent material is selected from the group consisting of indium-tin-oxide, tin oxide, indium oxide and doped hydrogenated amorphous silicon.