Semiconductor device and method for manufacturing the same

• US 8,106,400 B2
• Filed: 10/20/2009
• Issued: 01/31/2012
• Est. Priority Date: 10/24/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Miyairi, Hidekazu, Osada, Takeshi, Akimoto, Kengo, Yamazaki, Shunpei
• Primary Examiner(s): Dickey, Thomas L
• Assistant Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US12/581,919
• Publication Number:
  US 20100102314A1
• Time in Patent Office: 833 Days
• Field of Search: 257/43, 257/59, 257/E33.019, 257/E21.414, 257/E21.459, 257/E29.296, 257/9, 257/66, 257/72, 438/104, 438/158
• US Class Current: 257/72
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.

Claims

1. A semiconductor device comprising:

a pixel portion and a driver circuit,

wherein the pixel portion includes at least a first thin film transistor having a first oxide semiconductor layer,

wherein the driver circuit includes at least a second thin film transistor having a second oxide semiconductor layer and a third thin film transistor having a third oxide semiconductor layer are included,

wherein the third thin film transistor includes a first gate electrode below the third oxide semiconductor layer and a second gate electrode above the third oxide semiconductor layer,

wherein at least part of the third oxide semiconductor layer is provided between a source electrode and a drain electrode, and the second gate electrode overlapping with the third oxide semiconductor layer and the first gate electrode,

wherein the third oxide semiconductor layer is formed over the source electrode and the drain electrode, and

wherein the second thin film transistor is one of an enhancement type transistor and a depletion type transistor and the third thin film transistor is the other of the enhancement type transistor and the depletion type transistor.

2. The semiconductor device according to claim 1, wherein the first thin film transistor is electrically connected to a pixel electrode, and the pixel electrode is formed of the same material as the second gate electrode.

3. The semiconductor device according to claim 1, wherein the first thin film transistor is electrically connected to a pixel electrode, and the pixel electrode is formed of a different material from the second gate electrode.

4. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprise a material selected from the group consisting of indium, gallium, and zinc.

5. The semiconductor device according to claim 1, wherein the first gate electrode and the second gate electrode have the same potential.

6. The semiconductor device according to claim 1, wherein the first gate electrode and the second gate electrode have different potentials.

7. A semiconductor device comprising:

a first thin film transistor, and

a second thin film transistor,

wherein each of the first thin film transistor and the second thin film transistor includes a source electrode, a drain electrode, an oxide semiconductor layer, a first gate electrode, the oxide semiconductor layer and the first gate electrode overlapping with each other,

wherein the second thin film transistor further includes a second gate electrode, the first gate electrode and the second gate electrode overlapping with each other with the oxide semiconductor layer interposed therebetween,

wherein the oxide semiconductor layer is formed over the source electrode and the drain electrode of the second thin film transistor,

wherein one of the source electrode and the drain electrode of the first thin film transistor is electrically connected to one of the source electrode and the drain electrode of the second thin film transistor,

wherein one of the first gate electrode and the second gate electrode is electrically connected to the one of the source electrode and the drain electrode of the first thin film transistor, and

wherein the first thin film transistor is one of an enhancement type transistor and a depletion type transistor and the second thin film transistor is the other of the enhancement type transistor and the depletion type transistor.

8. The semiconductor device according to claim 7, wherein the oxide semiconductor layer comprises a material selected from the group consisting of indium, gallium, and zinc.

9. The semiconductor device according to claim 7, wherein the first gate electrode and the second gate electrode have the same potential.

10. The semiconductor device according to claim 7, wherein the first gate electrode and the second gate electrode have different potentials.

11. A semiconductor device comprising:

a first thin film transistor, and

a second thin film transistor,

wherein each of the first thin film transistor and the second thin film transistor includes a source electrode, a drain electrode, an oxide semiconductor layer formed over the source electrode and the drain electrode, and a first gate electrode, the oxide semiconductor layer and the first gate electrode overlapping with each other,

wherein only one of the first thin film transistor and the second thin film transistor further includes a second gate electrode,

wherein the oxide semiconductor layer of the only one of the first thin film transistor and the second thin film transistor is interposed between the first gate electrode of the only one of the first thin film transistor and the second thin film transistor and the second gate electrode,

wherein one of the source electrode and the drain electrode of the first thin film transistor is electrically connected to one of the source electrode and the drain electrode of the second thin film transistor,

wherein the first gate electrode of the first thin film transistor is electrically connected to the one of the source electrode and the drain electrode of the first thin film transistor.

12. The semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises a material selected from the group consisting of indium, gallium, and zinc.

13. The semiconductor device according to claim 11, wherein the first gate electrode and the second gate electrode have the same potential.

14. The semiconductor device according to claim 11, wherein the first gate electrode and the second gate electrode have different potentials.

15. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first gate electrode over an insulating surface;

forming a first insulating layer over the first gate electrode;

forming a source electrode and a drain electrode over the first insulating layer;

performing plasma treatment on the first insulating layer, the source electrode, and the drain electrode by reverse sputtering;

forming an oxide semiconductor layer over the source electrode and the drain electrode;

forming a second insulating layer covering the oxide semiconductor layer; and

forming a second gate electrode over the second insulating layer.

16. The method for manufacturing a semiconductor device, according to claim 15, wherein the oxide semiconductor layer comprises a material selected from the group consisting of indium, gallium, and zinc.