Three dimensional hexagonal matrix memory array

• US 8,107,270 B2
• Filed: 06/11/2010
• Issued: 01/31/2012
• Est. Priority Date: 12/27/2007
• Status: Expired

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk 3D LLC (Western Digital Corporation)
• Inventors: Scheuerlein, Roy E., Petti, Christopher J.
• Primary Examiner(s): NGUYEN, TAN
• Application Number:
  US12/801,504
• Publication Number:
  US 20100290262A1
• Time in Patent Office: 599 Days
• Field of Search: None
• US Class Current: 365/51
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G03F 7/2022 Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 5/025 Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device geometrical lay-out of the components in integrated circuits, H01L27/0207
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/1021 including diodes only
• CPC Class Codes: H10B 20/00 Read-only memory [ROM] devices
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/84 arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
• CPC Class Codes: H10N 70/20 Multistable switching devices, e.g. memristors
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/245 the species being metal cations, e.g. programmable metallization cells

Abstract

A nonvolatile memory device includes a plurality of nonvolatile memory cells arranged in a substantially hexagonal pattern. The nonvolatile memory cells may be pillar shaped non-volatile memory cells which can be patterned using triple or quadruple exposure lithography or by using a self-assembling layer.

Claims

1. A nonvolatile memory device, comprising a plurality of nonvolatile memory cells arranged in a substantially hexagonal pattern,

wherein the nonvolatile memory cells are arranged in a plurality of subarrays which are substantially parallelogram shaped and have a non-square corner.

2. The nonvolatile memory device of claim 1, wherein:

the plurality of nonvolatile memory cells comprises a plurality of pillar shaped current steering elements; and

the substantially hexagonal pattern comprises a repeating pattern of seven nonvolatile memory cells having a central nonvolatile memory cell surrounded by six other nonvolatile memory cells arranged in a hexagonal layout around the central nonvolatile memory cell.

3. The nonvolatile memory device of claim 1, wherein the device comprises:

a first nonvolatile memory cell,

a second nonvolatile memory cell, and

a third nonvolatile memory cell;

wherein the first nonvolatile memory cell, the second nonvolatile memory cell, and the third nonvolatile memory cell are equidistant from each other and are located in a same plane.

4. The nonvolatile memory device of claim 3, wherein the first nonvolatile memory cell, the second nonvolatile memory cell, and the third nonvolatile memory cell have a cell half pitch of less than about 32 nm.

5. The nonvolatile memory device of claim 1, wherein the device comprises a monolithic, three dimensional array of nonvolatile memory cells.

6. The nonvolatile memory device of claim 1, wherein each nonvolatile memory cell comprises a one time programmable or a rewritable cell selected from at least one of antifuse, fuse, diode and antifuse arranged in a series, polysilicon memory effect cell, metal oxide memory, switchable complex metal oxide, carbon nanotube memory, graphene switchable resistance material, phase change material memory, conductive bridge element, or switchable polymer memory.