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System comprising a state-monitoring memory element

  • US 8,111,577 B2
  • Filed: 09/19/2007
  • Issued: 02/07/2012
  • Est. Priority Date: 04/17/2007
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • at least one state-monitoring memory element having a reduced ability to retain a logic state compared to a normal memory element, the at least one state-monitoring memory element configured to lose the logic state before the normal memory element when a degraded input supply voltage drops below a threshold voltage;

    a circuit element, distinct from the at least one state-monitoring memory element, configured to cause the at least one state-monitoring memory element but not the normal memory element to have the reduced ability; and

    a failure detection element configured to detect a failure by the at least one state-monitoring memory element to retain the logic state and responsive to the detection to generate an indicator of the failure, and wherein the failure detection element is further configured to issue an interrupt signal to a system processor.

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